2.6. Memory

2.6.1. NOR boot flash
2.6.2. SDRAM
2.6.3. EEPROM

2.6.1. NOR boot flash

The EB2410ITX has provision for a single NOR flash device. This device typically contains the bootloader and optionally a Linux image to boot, though it can contain anything the user requires. The flash is implemented as a single sixteen bit wide device, which is selected by use of the nROMCS chip select from the system CPLD, nROMCS is derived from nCS<0> and nCS<1> from the S3C2410. This memory appears read only in chip select 0 (0x00000000 to 0x01FFFFFF) and read/write in chip select 1 (0x0C000000 to 0x0DFFFFFF) of the S3C2410 physical memory map.

Figure 2.4. NOR flash to S3C2410 attachment

NOR flash to S3C2410 attachment

2.6.2. SDRAM

The EB2410ITX has provision for four SDRAM devices with either the default 256MBit capacity or a 512MBit capacity. This memory, where fitted, is accessed using the S3C2410 SDRAM controller and appears in banks six and seven of its physical memory map (0x30000000 and 0x38000000).

Figure 2.5. SDRAM to S3C2410 attachment

SDRAM to S3C2410 attachment

2.6.3. EEPROM

There is provision for a single EEPROM connected via the I2C bus. All specification boards have an 8KBit (1KB) device fitted as standard but up to 256KBit can be accommodated. The device is typically used to hold the non volatile settings in the ABLE bootloader.