Simtec Electronics


IM2440D20 Connector pinouts

ProductIM2440D20
Date10/04/2006
ReferencePINLST003
AuthorVRS
Revision1.2

Contents

©2006 Simtec Electronics

$Id: pinlist.html 14541 2007-09-25 22:44:06Z vince $


Introduction

This document shows the pinouts for the IM2440D20. There are also notes and warnings on using the module in an application.

Several pins presented here have alternate functions on the S3c2440 CPU, they may obviously be used for their alternate function. A pins primay use is detailed here, other modules in the D200 range using other processors may not have the alternate functions.

IM2440D20 edge connector physical layout

Top Side Bottom Side
VOUT GND
nFRE ALE
nFWE CLE
nFCE<2> R/nB
D<0> D<16>
D<1> D<17>
D<2> D<18>
D<3> D<19>
D<4> D<20>
D<5> D<21>
D<6> D<22>
D<7> D<23>
D<8> D<24>
D<9> D<25>
D<10> D<26>
D<11> D<27>
D<12> D<28>
D<13> D<29>
D<14> D<30>
D<15> D<31>
Key
GND GND
nWBE<0> BUF_EN
nWBE<1> BUF_DIR
nWBE<2> PWN_EN
nWBE<3> nRESET
nWAIT nCS<1>
nIOCS16 nCS<2>
nRD nCS<3>
nWR nCS<4>
GND nCS<5>
A<0> A<15>
A<1> A<16>
A<2> A<17>
A<3> A<18>
A<4> A<19>
A<5> A<20>
A<6> A<21>
A<7> A<22>
A<8> A<23>
A<9> A<24>
A<10> A<25>
A<11> A<26>
A<12> TCLK0
A<13> TOUT<0>
A<14> TOUT<1>
GND TOUT<2>
DACK<0> TOUT<3>
DREQ<0> DACK<1>
I2S_LRCK DREQ<1>
I2S_CLK EINT<0>
I2S_CDCLK EINT<1>
I2S_SDI EINT<2>
I2S_SDO EINT<3>
SDCLK EINT<4>
SDCMD EINT<5>
SDDATA<0> EINT<6>
SDDATA<1> EINT<7>
SDDATA<2> EINT<8>
SDDATA<3> EINT<9>
SPIMISO EINT<10>
SPIMOSI EINT<11>
SPICLK EINT<12>
SCL EINT<13>
SDA EINT<14>
GND EINT<15>
LEND EINT<16>
VCLK RTS<1>
HS CTS<0>
VS EINT<19>
DE/VM CTS<0>
VD<0> RTS<0>
VD<1> TX<0>
VD<2> RX<0>
VD<3> TX<1>
VD<4> RX<1>
VD<5> TX<2>
VD<6> TX<1>
VD<7> VOUT
VD<8> ADC<0>
VD<9> ADC<0>
VD<10> ADC<1>
VD<11> ADC<2>
VD<12> ADC<3>
VD<13> ADC<4>
VD<14> ADC<5>
VD<15> ADC<6>
VD<16> ADC<7>
VD<17> GND
VD<18> DN<0>
VD<19> DP<0>
VD<20> DN<1>
VD<21> DP<1>
VD<22> nTRST
VD<23> TDI
GND TMS
VCC_RTC TCK
VIN TDO
VIN nRESET_IN
VIN GND
VIN GND

IM2440D20 edge connector pinouts by pin number

PinSignalDescription
1VOUTOutput supply from module
2GNDGround
3nFREInverted read enable
4ALENAND address latch enable
5nFWENAND Inverted write enable
6CLENAND Command latch enable
7nFCE<2>Third NAND chip select
8R/nBNAND ready/not busy
9D<0>Data bus bit 0
10D<16>Data bus bit 16
11D<1>Data bus bit 1
12D<17>Data bus bit 17
13D<2>Data bus bit 2
14D<18>Data bus bit 18
15D<3>Data bus bit 3
16D<19>Data bus bit 19
17D<4>Data bus bit 4
18D<20>Data bus bit 20
19D<5>Data bus bit 5
20D<21>Data bus bit 21
21D<6>Data bus bit 6
22D<22>Data bus bit 22
23D<7>Data bus bit 7
24D<23>Data bus bit 23
25D<8>Data bus bit 8
26D<24>Data bus bit 24
27D<9>Data bus bit 9
28D<25>Data bus bit 25
29D<10>Data bus bit 10
30D<26>Data bus bit 26
31D<11>Data bus bit 11
32D<27>Data bus bit 27
33D<12>Data bus bit 12
34D<28>Data bus bit 28
35D<13>Data bus bit 13
36D<29>Data bus bit 29
37D<14>Data bus bit 14
38D<30>Data bus bit 30
39D<15>Data bus bit 15
40D<31>Data bus bit 31
41GNDGround
42GNDGround
43nWBE<0>First inverted write byte enable
44BUF_ENBuffer enable
45nWBE<1>Second inverted write byte enable
46BUF_DIRBuffer direction
47nWBE<2>Third inverted write byte enable
48PWN_ENPower good output
49nWBE<3>Forth inverted write byte enable
50nRESETInverted reset output
51nWAITInverted I/O wait signal
52nCS<1>First inverted chip select
53nIOCS16Inverted sixteen bit access select
54nCS<2>Second inverted chip select
55nRDInverted read select
56nCS<3>Third inverted chip select
57nWRInverted write select
58nCS<4>Fourth inverted chip select
59GNDGround
60nCS<5>Fifth inverted chip select
61A<0>Address bus bit 0
62A<15>Address bus bit 15
63A<1>Address bus bit 1
64A<16>Address bus bit 16
65A<2>Address bus bit 2
66A<17>Address bus bit 17
67A<3>Address bus bit 3
68A<18>Address bus bit 18
69A<4>Address bus bit 4
70A<19>Address bus bit 19
71A<5>Address bus bit 5
72A<20>Address bus bit 20
73A<6>Address bus bit 6
74A<21>Address bus bit 21
75A<7>Address bus bit 7
76A<22>Address bus bit 22
77A<8>Address bus bit 8
78A<23>Address bus bit 23
79A<9>Address bus bit 9
80A<24>Address bus bit 24
81A<10>Address bus bit 10
82A<25>Address bus bit 25
83A<11>Address bus bit 11
84A<26>Address bus bit 26
85A<12>Address bus bit 12
86TCLK0Timer 0 output
87A<13>Address bus bit 13
88TOUT<0>First PWM output
89A<14>Address bus bit 14
90TOUT<1>Second PWM output
91GNDGround
92TOUT<2>Third PWM output
93DACK<0>First DMA acknowledge
94TOUT<3>Fourth PWM output
95DREQ<0>First DMA request
96DACK<1>Second DMA acknowledge
97I2S_LRCKI2S left right select
98DREQ<1>Second DMA request
99I2S_CLKI2S clock
100EINT<0>External interrupt 0
101I2S_CDCLKI2S command/data select
102EINT<1>External interrupt 1
103I2S_SDII2S serial data in
104EINT<2>External interrupt 2
105I2S_SDOI2S serial data out
106EINT<3> External interrupt 3
107SDCLKSD card clock
108EINT<4> External interrupt 4
109SDCMDSD card command
110EINT<5> External interrupt 5
111SDDATA<0>SD card first data line
112EINT<6>External interrupt 6
113SDDATA<1>SD card second data line
114EINT<7> External interrupt 7
115SDDATA<2>SD card third data line
116EINT<8> External interrupt 8
117SDDATA<3>SD card fourth data line
118EINT<9> External interrupt 9
119SPIMISOSPI bus master in slave out
120EINT<10> External interrupt 10
121SPIMOSISPI bus master out slave in
122EINT<11>External interrupt 11
123SPICLKSPI bus clock
124EINT<12>External interrupt 12
125SCLI2C bus clock
126EINT<13> External interrupt 13
127SDAI2C bus data
128EINT<14>External interrupt 14
129GNDGround
130EINT<15> External interrupt 15
131LENDLine end
132EINT<16> External interrupt 16
133VCLKVideo clock
134RTS<1>Second serial port request to send
135HSHorizontal sync
136CTS<1>Second serial port clear to send
137VSVertical sync
138EINT<19>External interrupt 19
139DE/VMVideo data enable
140CTS<0>First serial port Clear To Send
141VD<0>Video bus bit 0
142RTS<0>First serial port Request To Send
143VD<1>Video bus bit 1
144TX<0>First serial port transmit
145VD<2>Video bus bit 2
146RX<0>First serial port recive
147VD<3>Video bus bit 3
148TX<1>Second serial port transmit
149VD<4>Video bus bit 4
150RX<1>Second serial port recive
151VD<5>Video bus bit 5
152TX<2>Third serial port transmit
153VD<6>Video bus bit 6
154RX<1>Third serial port recive
155VD<7>Video bus bit 7
156VOUTOutput supply from module
157VD<8>Video bus bit 8
158GNDAnalog Ground
159VD<9>Video bus bit 9
160ADC<0>Analog input 0
161VD<10>Video bus bit 10
162ADC<1>Analog input 1
163VD<11>Video bus bit 11
164ADC<2>Analog input 2
165VD<12>Video bus bit 12
166ADC<3>Analog input 3
167VD<13>Video bus bit 13
168ADC<4>Analog input 4
169VD<14>Video bus bit 14
170ADC<5>Analog input 5
171VD<15>Video bus bit 15
172ADC<6>Analog input 6
173VD<16>Video bus bit 16
174ADC<7>Analog input 7
175VD<17>Video bus bit 17
176GNDGround
177VD<18>Video bus bit 18
178DN<0>Data negative for USB port 0
179VD<19>Video bus bit 19
180DP<0>Data positive for USB port 0
181VD<20>Video bus bit 20
182DN<1>Data negative for USB port 0
183VD<21>Video bus bit 21
184DP<1>Data positive for USB port 1
185VD<22>Video bus bit 22
186nTRSTInverted tap reset
187VD<23>Video bus bit 23
188TDITap data input
189GNDGround
190TMSTap mode select
191VCC_RTCReal time clock supply
192TCKTap clock
193VINPower supply
194TDOTap data out
195VINPower supply
196nRESETInverted reset input
197VINPower supply
198GNDGround
199VINPower supply
200GNDGround

IM2440D20 edge connector pins by function

Power supply

FunctionPins
VIN193, 195, 197, 199
VOUT1, 156
GND2, 41, 42, 59, 91, 129, 158, 176, 189, 198, 200

The module is powered from four input pins (VIN) from which it generates all necessary internal voltages. This is achieved with a Texas Instruments TPS65011, this device is controlled from the CPU by using the I2C bus and is at address 0x24.

The nominal input operating voltages are 3.3 to 5V with a 5% tolerance. The absolute maximum ratings are 3.15V to 5.5V. The modules typical power consumption is 0.5W (150mA at 3.3V) when operating in a normal configuration at 400MHz.

The two output pins (VOUT) provide output supply from the modules internal main power bus. The main bus is configured to default to 3.0V operation (this still lies within the typical 10% margin allowed for supplies on 3.3V devices) which saves power and gives a wider input operating voltage.

The VOUT output may be used to supply up to 300mA at 3.3V absolute maximum. The output must not be connected to the input supply or damage will occur. The output voltage will never exceed the input supply despite the output voltage selection.

The modules main supply voltage may be altered to one of 3.3, 3.0, 2.75 or 2.5V once the system is running, however correct module operations for settings below 3.0V are not guaranteed.

Extenal peripheral bus

FunctionPins
nWBE<0 - 3>43,45,47,49
nCS<1 - 5>52,54,56,58,60
nWAIT51
nIOCS1653
nRD55
nWR57
BUF_EN44
BUF_DIR46
A<0 - 26>61 - 84
D<0 - 31>9 - 40

Video

FunctionPins
LEND131
VCLK133
HS135
VS137
DE/VM139
VD<0 - 23>141, 143, 145, 147, 149, 151, 153, 155, 157, 159, 161, 163, 165, 167, 169, 171, 173, 175, 177, 179, 181, 183, 185, 187

The digital video bus allows for up to 24bit video output direct from the S3C2440. The bus may be reconfigured as required for the specific video requirements.

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