diff -urN linux-2.4.29/Documentation/Configure.help linux-2.4.x/Documentation/Configure.help
--- linux-2.4.29/Documentation/Configure.help	2005-11-22 18:34:04.000000000 +0000
+++ linux-2.4.x/Documentation/Configure.help	2005-11-22 18:43:49.000000000 +0000
@@ -19615,6 +19615,19 @@
   <file:Documentation/modules.txt>.  The module will be called
   isicom.o.
 
+OKI ML67XXXX SSP serial port support Support
+CONFIG_SERIAL_ML67XXXX
+  The ML67XXXX has an additional non standard serial UART. This driver
+  supports this serial UART.
+
+Baud rates below 9600 baud
+CONFIG_OKI_CCLK_HAVLED
+  The ML67XXXX additional non standard serial UART cannot support
+  BAUD rates below 9600 baud without this setting enabled, however
+  this limits the maximum frequency of every other peripheral and
+  may adversely impact performace. Only enable this option if you
+  *need* baud rates below 9600 on the SSP serial port.
+
 Unix98 PTY support
 CONFIG_UNIX98_PTYS
   A pseudo terminal (PTY) is a software device consisting of two
diff -urN linux-2.4.29/arch/armnommu/Makefile linux-2.4.x/arch/armnommu/Makefile
--- linux-2.4.29/arch/armnommu/Makefile	2005-11-22 18:34:00.000000000 +0000
+++ linux-2.4.x/arch/armnommu/Makefile	2005-11-22 18:43:49.000000000 +0000
@@ -161,6 +161,11 @@
 MACHINE		= atmel
 endif
 
+ifeq ($(CONFIG_MACH_EB67XDIP),y)
+TEXTADDR	= 0x00008000
+MACHINE		= okim67x
+endif
+
 ifeq ($(CONFIG_ARCH_NETARM),y)
 MACHINE 	 = netarm
 # This allows it to use the internal bootloader.
diff -urN linux-2.4.29/arch/armnommu/config.in linux-2.4.x/arch/armnommu/config.in
--- linux-2.4.29/arch/armnommu/config.in	2005-11-22 18:33:59.000000000 +0000
+++ linux-2.4.x/arch/armnommu/config.in	2005-11-22 18:43:49.000000000 +0000
@@ -58,6 +58,7 @@
 	  SWARM			CONFIG_ARCH_SWARM \
 	  Intersil		CONFIG_ARCH_INL \
 	  Samsung		CONFIG_ARCH_SAMSUNG \
+	  OKIM67X		CONFIG_MACH_EB67XDIP \
 	  Atmel			CONFIG_ARCH_ATMEL \
 	  iPod			CONFIG_ARCH_IPOD" TI-DSC21
 
@@ -299,6 +300,35 @@
    fi
 fi
 
+if [ "$CONFIG_MACH_EB67XDIP" = "y" ]; then
+   define_bool CONFIG_NO_PGT_CACHE y
+   define_bool CONFIG_CPU_ARM710 y
+   define_bool CONFIG_CPU_32 y
+   define_bool CONFIG_CPU_32v4 y
+   define_bool CONFIG_CPU_WITH_CACHE n
+   define_bool CONFIG_CPU_WITH_MCR_INSTRUCTION n
+  
+   choice ' OKI CPU' \
+   	" M67400X		CONFIG_CPU_OKIM67400X \
+	  M67500X 		CONFIG_CPU_OKIM67500X" M67400X
+
+   int  'CPU clock frequency' CONFIG_ARM_CLK 25000000 
+   bool 'Serial Console' CONFIG_SERIAL_OKI_CONSOLE
+
+   if [ "$CONFIG_SET_MEM_PARAM" = "n" ]; then
+      define_hex DRAM_BASE 0x00000000
+      define_hex DRAM_SIZE 0x02000000
+      define_hex FLASH_MEM_BASE 0xC8000000
+      define_hex FLASH_SIZE 0x00200000
+   fi
+	
+   hex 'Memory mapped 16-bit io base' CONFIG_MEM16_BASE 0xf4000000
+   hex 'Memory mapped 8-bit io base' CONFIG_MEM8_BASE 0xf4000000
+   hex '16-bit io base' CONFIG_IO16_BASE 0xf4000000
+   hex '8-bit io base' CONFIG_IO8_BASE 0xf4000000
+	
+fi
+
 if [ "$CONFIG_ARCH_NETARM" = "y" ]; then
    define_bool CONFIG_CPU_ARM710 y
    define_bool CONFIG_CPU_ARM7TDMI y
@@ -604,7 +634,7 @@
    fi
 
    hex '  SDRAM Base Address' DRAM_BASE $DRAM_BASE
-   hex '  Compressed Kernel Link Address' CONFIG_ZIMAGE_TEXTADDR $CONFIG_ZIMAGE_TEXTADDR
+   hex '  Compressed Kernel Link Address' CONFIG_ZIMAGE_TEXTADDR 0x00420000
    bool 'Expert settings?' CONFIG_EXPERT_INL n
    if [ "$CONFIG_EXPERT_INL" = "y" ]; then
       int '  Asyncronous Clock Frequency' CONFIG_ARM_CLK 88000000 44000000 160000000
diff -urN linux-2.4.29/arch/armnommu/def-configs/oki-eb67dip linux-2.4.x/arch/armnommu/def-configs/oki-eb67dip
--- linux-2.4.29/arch/armnommu/def-configs/oki-eb67dip	1970-01-01 01:00:00.000000000 +0100
+++ linux-2.4.x/arch/armnommu/def-configs/oki-eb67dip	2005-11-22 18:43:49.000000000 +0000
@@ -0,0 +1,546 @@
+#
+# Automatically generated make config: don't edit
+#
+CONFIG_ARM=y
+# CONFIG_SBUS is not set
+CONFIG_UID16=y
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+CONFIG_UCLINUX=y
+MAGIC_ROM_PTR=y
+
+#
+# Code maturity level options
+#
+CONFIG_EXPERIMENTAL=y
+# CONFIG_OBSOLETE is not set
+
+#
+# Loadable module support
+#
+# CONFIG_MODULES is not set
+
+#
+# System Type
+#
+# CONFIG_ARCH_DSC21 is not set
+# CONFIG_ARCH_VC547X is not set
+# CONFIG_ARCH_DM270 is not set
+# CONFIG_ARCH_CNXT is not set
+# CONFIG_ARCH_NETARM is not set
+# CONFIG_ARCH_TA7S is not set
+# CONFIG_ARCH_TA7V is not set
+# CONFIG_ARCH_SWARM is not set
+# CONFIG_ARCH_INL is not set
+# CONFIG_ARCH_SAMSUNG is not set
+CONFIG_MACH_EB67XDIP=y
+# CONFIG_ARCH_ATMEL is not set
+# CONFIG_ARCH_IPOD is not set
+# CONFIG_CPU_BIG_ENDIAN is not set
+# CONFIG_SET_MEM_PARAM is not set
+CONFIG_RAMKERNEL=y
+# CONFIG_ROMKERNEL is not set
+CONFIG_NO_PGT_CACHE=y
+CONFIG_CPU_ARM710=y
+CONFIG_CPU_32=y
+CONFIG_CPU_32v4=y
+# CONFIG_CPU_WITH_CACHE is not set
+# CONFIG_CPU_WITH_MCR_INSTRUCTION is not set
+CONFIG_CPU_OKIM67400X=y
+# CONFIG_CPU_OKIM67500X is not set
+CONFIG_ARM_CLK=32768000
+# CONFIG_SERIAL_OKI_CONSOLE is not set
+DRAM_BASE=0x00000000
+DRAM_SIZE=0x02000000
+FLASH_MEM_BASE=0xC8000000
+FLASH_SIZE=0x00200000
+CONFIG_MEM16_BASE=03000000
+CONFIG_MEM8_BASE=03000000
+CONFIG_IO16_BASE=02000000
+CONFIG_IO8_BASE=02000000
+
+#
+# General setup
+#
+# CONFIG_HOTPLUG is not set
+# CONFIG_PCMCIA is not set
+CONFIG_NET=y
+# CONFIG_SYSVIPC is not set
+CONFIG_REDUCED_MEMORY=y
+# CONFIG_BSD_PROCESS_ACCT is not set
+# CONFIG_SYSCTL is not set
+# CONFIG_NWFPE is not set
+# CONFIG_KCORE_ELF is not set
+CONFIG_KCORE_AOUT=y
+CONFIG_BINFMT_FLAT=y
+CONFIG_BINFMT_ZFLAT=y
+CONFIG_KERNEL_ELF=y
+# CONFIG_PM is not set
+# CONFIG_ARTHUR is not set
+CONFIG_ALIGNMENT_TRAP=y
+# CONFIG_PCI is not set
+# CONFIG_RAM_ATTACHED_ROMFS is not set
+
+#
+# Networking options
+#
+CONFIG_PACKET=y
+# CONFIG_PACKET_MMAP is not set
+# CONFIG_NETLINK_DEV is not set
+# CONFIG_NETFILTER is not set
+# CONFIG_FILTER is not set
+# CONFIG_NET_NEIGH_DEBUG is not set
+# CONFIG_NET_RESTRICTED_REUSE is not set
+CONFIG_UNIX=y
+CONFIG_INET=y
+# CONFIG_IP_MULTICAST is not set
+# CONFIG_IP_ADVANCED_ROUTER is not set
+# CONFIG_IP_PNP is not set
+# CONFIG_NET_ARP_LIMIT is not set
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE is not set
+# CONFIG_ARPD is not set
+# CONFIG_INET_ECN is not set
+# CONFIG_SYN_COOKIES is not set
+# CONFIG_IPV6 is not set
+# CONFIG_KHTTPD is not set
+
+#
+#    SCTP Configuration (EXPERIMENTAL)
+#
+# CONFIG_IP_SCTP is not set
+# CONFIG_ATM is not set
+# CONFIG_VLAN_8021Q is not set
+
+#
+#  
+#
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_DECNET is not set
+# CONFIG_BRIDGE is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_LLC is not set
+# CONFIG_NET_DIVERT is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+# CONFIG_NET_FASTROUTE is not set
+# CONFIG_NET_HW_FLOWCONTROL is not set
+
+#
+# QoS and/or fair queueing
+#
+# CONFIG_NET_SCHED is not set
+# CONFIG_IPSEC is not set
+# CONFIG_KLIPS is not set
+
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+
+#
+# Network device support
+#
+CONFIG_NETDEVICES=y
+
+#
+# ARCnet devices
+#
+# CONFIG_ARCNET is not set
+# CONFIG_DUMMY is not set
+# CONFIG_BONDING is not set
+# CONFIG_EQUALIZER is not set
+
+#
+# IMQ needs CONFIG_NETFILTER enabled
+#
+# CONFIG_TUN is not set
+# CONFIG_ETHERTAP is not set
+
+#
+# Ethernet (10 or 100Mbit)
+#
+CONFIG_NET_ETHERNET=y
+# CONFIG_ARM_AM79C961A is not set
+# CONFIG_ARM_CIRRUS is not set
+# CONFIG_NET_VENDOR_3COM is not set
+# CONFIG_LANCE is not set
+# CONFIG_NET_VENDOR_SMC is not set
+# CONFIG_NET_VENDOR_RACAL is not set
+# CONFIG_NET_ISA is not set
+# CONFIG_NET_PCI is not set
+# CONFIG_NET_POCKET is not set
+# CONFIG_CNXT_EMAC is not set
+# CONFIG_FEC is not set
+CONFIG_ARM_EB67DIP_OKI=y
+# CONFIG_CS89x0 is not set
+# CONFIG_UCCS8900 is not set
+
+#
+# Ethernet (1000 Mbit)
+#
+# CONFIG_FDDI is not set
+# CONFIG_HIPPI is not set
+# CONFIG_PPP is not set
+# CONFIG_SLIP is not set
+
+#
+# Wireless LAN (non-hamradio)
+#
+# CONFIG_NET_RADIO is not set
+
+#
+# Token Ring devices
+#
+# CONFIG_TR is not set
+# CONFIG_NET_FC is not set
+# CONFIG_SHAPER is not set
+
+#
+# Wan interfaces
+#
+# CONFIG_WAN is not set
+
+#
+# Amateur Radio support
+#
+# CONFIG_HAMRADIO is not set
+
+#
+# IrDA (infrared) support
+#
+# CONFIG_IRDA is not set
+
+#
+# ATA/IDE/MFM/RLL support
+#
+# CONFIG_IDE is not set
+# CONFIG_BLK_DEV_HD is not set
+
+#
+# SCSI support
+#
+# CONFIG_SCSI is not set
+
+#
+# ISDN subsystem
+#
+# CONFIG_ISDN is not set
+
+#
+# Parallel port support
+#
+# CONFIG_PARPORT is not set
+
+#
+# Memory Technology Devices (MTD)
+#
+CONFIG_MTD=y
+# CONFIG_MTD_DEBUG is not set
+CONFIG_MTD_PARTITIONS=y
+# CONFIG_MTD_CONCAT is not set
+CONFIG_MTD_REDBOOT_PARTS=y
+# CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED is not set
+# CONFIG_MTD_REDBOOT_PARTS_READONLY is not set
+# CONFIG_MTD_CMDLINE_PARTS is not set
+# CONFIG_MTD_AFS_PARTS is not set
+
+#
+# User Modules And Translation Layers
+#
+CONFIG_MTD_CHAR=y
+# CONFIG_MTD_BLOCK is not set
+CONFIG_MTD_BLOCK_RO=y
+CONFIG_FTL=y
+# CONFIG_NFTL is not set
+# CONFIG_INFTL is not set
+
+#
+# RAM/ROM/Flash chip drivers
+#
+CONFIG_MTD_CFI=y
+CONFIG_MTD_JEDECPROBE=y
+CONFIG_MTD_GEN_PROBE=y
+# CONFIG_MTD_CFI_ADV_OPTIONS is not set
+# CONFIG_MTD_CFI_INTELEXT is not set
+CONFIG_MTD_CFI_AMDSTD=y
+CONFIG_MTD_CFI_STAA=y
+CONFIG_MTD_RAM=y
+CONFIG_MTD_ROM=y
+# CONFIG_MTD_ABSENT is not set
+# CONFIG_MTD_OBSOLETE_CHIPS is not set
+
+#
+# Mapping drivers for chip access
+#
+# CONFIG_MTD_PHYSMAP is not set
+# CONFIG_MTD_NETtel is not set
+# CONFIG_MTD_SNAPGEODE is not set
+# CONFIG_MTD_NETteluC is not set
+# CONFIG_MTD_MBVANILLA is not set
+# CONFIG_MTD_ML401 is not set
+# CONFIG_MTD_SUZAKU is not set
+# CONFIG_MTD_KeyTechnology is not set
+# CONFIG_MTD_SED_SIOSIII is not set
+# CONFIG_MTD_NORA is not set
+# CONFIG_MTD_ARM_INTEGRATOR is not set
+# CONFIG_MTD_CDB89712 is not set
+# CONFIG_MTD_SA1100 is not set
+# CONFIG_MTD_DC21285 is not set
+# CONFIG_MTD_IQ80310 is not set
+# CONFIG_MTD_EPXA10DB is not set
+# CONFIG_MTD_FORTUNET is not set
+# CONFIG_MTD_AUTCPU12 is not set
+# CONFIG_MTD_IXP425 is not set
+# CONFIG_MTD_SE4000 is not set
+# CONFIG_MTD_SNAPARM is not set
+# CONFIG_MTD_CLPS7500 is not set
+# CONFIG_MTD_EDB7312 is not set
+# CONFIG_MTD_EDB9301 is not set
+# CONFIG_MTD_EDB9302 is not set
+# CONFIG_MTD_EDB9312 is not set
+# CONFIG_MTD_EDB9315 is not set
+# CONFIG_MTD_IMPA7 is not set
+# CONFIG_MTD_CEIVA is not set
+# CONFIG_MTD_VC547X is not set
+# CONFIG_MTD_TIBURON is not set
+CONFIG_MTD_EB67DIP=y
+# CONFIG_MTD_M5272C3 is not set
+# CONFIG_MTD_CPU16B is not set
+# CONFIG_MTD_UCLINUX is not set
+
+#
+# Self-contained MTD device drivers
+#
+# CONFIG_MTD_SLRAM is not set
+# CONFIG_MTD_MTDRAM is not set
+# CONFIG_MTD_BLKMTD is not set
+
+#
+# Disk-On-Chip Device Drivers
+#
+# CONFIG_MTD_DOC1000 is not set
+# CONFIG_MTD_DOC2000 is not set
+# CONFIG_MTD_DOC2001 is not set
+# CONFIG_MTD_DOC2001PLUS is not set
+# CONFIG_MTD_DOCPROBE is not set
+
+#
+# NAND Flash Device Drivers
+#
+# CONFIG_MTD_NAND is not set
+
+#
+# Plug and Play configuration
+#
+# CONFIG_PNP is not set
+
+#
+# Block devices
+#
+# CONFIG_BLK_DEV_FD is not set
+# CONFIG_BLK_DEV_XD is not set
+# CONFIG_BLK_DEV_LOOP is not set
+# CONFIG_BLK_DEV_NBD is not set
+CONFIG_BLK_DEV_RAM=y
+CONFIG_BLK_DEV_RAM_SIZE=4096
+CONFIG_BLK_DEV_INITRD=y
+# CONFIG_BLK_DEV_RAMDISK_DATA is not set
+# CONFIG_BLK_DEV_BLKMEM is not set
+# CONFIG_BLK_STATS is not set
+
+#
+# File systems
+#
+# CONFIG_QUOTA is not set
+# CONFIG_AUTOFS_FS is not set
+# CONFIG_AUTOFS4_FS is not set
+# CONFIG_REISERFS_FS is not set
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_HFSPLUS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EXT3_FS is not set
+# CONFIG_JBD is not set
+# CONFIG_FAT_FS is not set
+# CONFIG_EFS_FS is not set
+# CONFIG_JFFS_FS is not set
+# CONFIG_JFFS2_FS is not set
+# CONFIG_CRAMFS is not set
+# CONFIG_TMPFS is not set
+CONFIG_RAMFS=y
+# CONFIG_ISO9660_FS is not set
+# CONFIG_JFS_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_VXFS_FS is not set
+# CONFIG_NTFS_FS is not set
+# CONFIG_HPFS_FS is not set
+CONFIG_PROC_FS=y
+# CONFIG_DEVFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+CONFIG_ROMFS_FS=y
+CONFIG_EXT2_FS=y
+# CONFIG_SYSV_FS is not set
+# CONFIG_UDF_FS is not set
+# CONFIG_UFS_FS is not set
+# CONFIG_XFS_FS is not set
+
+#
+# Network File Systems
+#
+# CONFIG_CODA_FS is not set
+# CONFIG_INTERMEZZO_FS is not set
+CONFIG_NFS_FS=y
+# CONFIG_NFS_V3 is not set
+# CONFIG_NFS_DIRECTIO is not set
+# CONFIG_NFSD is not set
+CONFIG_SUNRPC=y
+CONFIG_LOCKD=y
+# CONFIG_SMB_FS is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_ZISOFS_FS is not set
+# CONFIG_COREDUMP_PRINTK is not set
+
+#
+# Partition Types
+#
+# CONFIG_PARTITION_ADVANCED is not set
+# CONFIG_SMB_NLS is not set
+# CONFIG_NLS is not set
+
+#
+# Input core support
+#
+# CONFIG_INPUT is not set
+
+#
+# Character devices
+#
+# CONFIG_SERIAL_SAMSUNG is not set
+CONFIG_SERIAL_ML67XXXX=y
+CONFIG_SERIAL_CONSOLE=y
+# CONFIG_LEDMAN is not set
+# CONFIG_SNAPDOG is not set
+# CONFIG_FAST_TIMER is not set
+# CONFIG_DS1302 is not set
+# CONFIG_M41T11M6 is not set
+# CONFIG_VT is not set
+CONFIG_SERIAL=y
+CONFIG_SERIAL_CONSOLE=y
+# CONFIG_SERIAL_EXTENDED is not set
+# CONFIG_SERIAL_NONSTANDARD is not set
+
+#
+# Serial drivers
+#
+# CONFIG_SERIAL_ANAKIN is not set
+# CONFIG_SERIAL_AMBA is not set
+# CONFIG_SERIAL_CLPS711X is not set
+# CONFIG_SERIAL_21285 is not set
+# CONFIG_SERIAL_UART00 is not set
+# CONFIG_SERIAL_SA1100 is not set
+# CONFIG_SERIAL_OMAHA is not set
+# CONFIG_SERIAL_AT91 is not set
+# CONFIG_SERIAL_8250 is not set
+# CONFIG_UNIX98_PTYS is not set
+
+#
+# I2C support
+#
+# CONFIG_I2C is not set
+
+#
+# Mice
+#
+# CONFIG_BUSMOUSE is not set
+# CONFIG_MOUSE is not set
+# CONFIG_EDB7312_TS is not set
+
+#
+# Joysticks
+#
+# CONFIG_INPUT_GAMEPORT is not set
+
+#
+# Input core support is needed for gameports
+#
+
+#
+# Input core support is needed for joysticks
+#
+# CONFIG_QIC02_TAPE is not set
+# CONFIG_IPMI_HANDLER is not set
+
+#
+# Controller Area Network Cards/Chips
+#
+# CONFIG_CAN4LINUX is not set
+
+#
+# Watchdog Cards
+#
+# CONFIG_WATCHDOG is not set
+# CONFIG_SCx200 is not set
+# CONFIG_NVRAM is not set
+# CONFIG_RTC is not set
+# CONFIG_DTLK is not set
+# CONFIG_R3964 is not set
+# CONFIG_APPLICOM is not set
+
+#
+# Ftape, the floppy tape device driver
+#
+# CONFIG_FTAPE is not set
+# CONFIG_AGP is not set
+
+#
+# Direct Rendering Manager (XFree86 DRI support)
+#
+# CONFIG_DRM is not set
+
+#
+# USB support
+#
+# CONFIG_USB is not set
+
+#
+# Support for USB gadgets
+#
+# CONFIG_USB_GADGET is not set
+
+#
+# IEEE 1394 (FireWire) support (EXPERIMENTAL)
+#
+# CONFIG_IEEE1394 is not set
+
+#
+# I2O device support
+#
+# CONFIG_I2O is not set
+
+#
+# Kernel hacking
+#
+CONFIG_FRAME_POINTER=y
+# CONFIG_REVISIT is not set
+CONFIG_DEBUG_ERRORS=y
+CONFIG_DEBUG_USER=y
+CONFIG_DEBUG_INFO=y
+CONFIG_DEBUG_LL=y
+# CONFIG_CONTIGUOUS_PAGE_ALLOC is not set
+# CONFIG_NO_MMU_LARGE_ALLOCS is not set
+
+#
+# Cryptographic options
+#
+# CONFIG_CRYPTO is not set
+
+#
+# Library routines
+#
+CONFIG_CRC32=y
+CONFIG_ZLIB_INFLATE=y
+CONFIG_ZLIB_DEFLATE=y
diff -urN linux-2.4.29/arch/armnommu/kernel/debug-armv.S linux-2.4.x/arch/armnommu/kernel/debug-armv.S
--- linux-2.4.29/arch/armnommu/kernel/debug-armv.S	2005-11-22 18:33:59.000000000 +0000
+++ linux-2.4.x/arch/armnommu/kernel/debug-armv.S	2005-11-22 18:43:49.000000000 +0000
@@ -419,6 +419,28 @@
 		/* Nothing to do here */
 		.endm
 #endif /* ISL3893_SIMSONLY */
+#elif defined(CONFIG_MACH_EB67XDIP)
+                .macro  addruart,rx
+		mov	\rx, #0xb7000000
+		orr	\rx, \rx, #0x00b00000
+                .endm
+
+                .macro  senduart,rd,rx
+                strb    \rd, [\rx, #0x00]       @ UART_THR
+                .endm
+
+                .macro  waituart,rd,rx
+1001:           ldrb    \rd, [\rx, #0x14]       
+                tst     \rd, #0x00000020        
+                beq     1001b                   @ loop til clear
+                .endm
+
+                .macro  busyuart,rd,rx
+1002:           ldrb    \rd, [\rx, #0x14]       @ UART_LSR
+                tst     \rd, #0x00000040        @ 1=THR is empty
+                beq     1002b                   @ Loop til set
+                .endm
+	
 #else
 #error Unknown architecture
 #endif
diff -urN linux-2.4.29/arch/armnommu/kernel/entry-armv.S linux-2.4.x/arch/armnommu/kernel/entry-armv.S
--- linux-2.4.29/arch/armnommu/kernel/entry-armv.S	2005-11-22 18:33:59.000000000 +0000
+++ linux-2.4.x/arch/armnommu/kernel/entry-armv.S	2005-11-22 18:43:49.000000000 +0000
@@ -806,6 +806,26 @@
 		.macro	irq_prio_table
 		.endm
 
+#elif defined(CONFIG_MACH_EB67XDIP)
+		.macro	disable_fiq
+		.endm
+
+		.macro	get_irqnr_and_base, irqnr, irqstat, base, tmp
+		@@ldr	\base, = 0xb7b00000
+		@@mov	\tmp, #'i'
+		@@strb	\tmp, [ \base, # 0 ]
+		
+		ldr	\base, =OKI_IRQ		@read interrupt nr.
+		ldr	\irqnr, [ \base, #OKI_IRN - OKI_IRQ]
+		teq	\irqnr, #0
+		ldreq	\tmp, [ \base, #OKI_IRQ - OKI_IRQ ]
+		teqeq	\tmp, #0
+
+		.endm
+
+		.macro	irq_prio_table
+		.endm
+
 #elif defined(CONFIG_ARCH_TA7S) || defined(CONFIG_ARCH_TA7V)
 #include <asm/arch/arch.h>
 
diff -urN linux-2.4.29/arch/armnommu/kernel/entry-common.S linux-2.4.x/arch/armnommu/kernel/entry-common.S
--- linux-2.4.29/arch/armnommu/kernel/entry-common.S	2005-11-22 18:33:59.000000000 +0000
+++ linux-2.4.x/arch/armnommu/kernel/entry-common.S	2005-11-22 18:43:49.000000000 +0000
@@ -138,7 +138,7 @@
 	ldr	scno, [lr, #-4]			@ get SWI instruction
 	arm710_bug_check scno, ip
 
-#ifdef CONFIG_ALIGNMENT_TRAP
+#if defined(CONFIG_ALIGNMENT_TRAP) && !(defined(CONFIG_CPU_OKIM67400X) || defined(CONFIG_CPU_OKIM67500X))
 	ldr	ip, __cr_alignment
 	ldr	ip, [ip]
 	mcr	p15, 0, ip, c1, c0		@ update control register
diff -urN linux-2.4.29/arch/armnommu/kernel/entry-header.S linux-2.4.x/arch/armnommu/kernel/entry-header.S
--- linux-2.4.29/arch/armnommu/kernel/entry-header.S	2005-11-22 18:33:59.000000000 +0000
+++ linux-2.4.x/arch/armnommu/kernel/entry-header.S	2005-11-22 18:43:49.000000000 +0000
@@ -126,7 +126,7 @@
 		.endm
 
 		.macro	alignment_trap, rbase, rtemp, sym
-#ifdef CONFIG_ALIGNMENT_TRAP
+#if defined(CONFIG_ALIGNMENT_TRAP) && !(defined(CONFIG_CPU_OKIM67400X) || defined(CONFIG_CPU_OKIM67500X))
 #define OFF_CR_ALIGNMENT(x)	cr_alignment - x
 
 		ldr	\rtemp, [\rbase, #OFF_CR_ALIGNMENT(\sym)]
@@ -197,5 +197,3 @@
 tbl	.req	r8				@ syscall table pointer
 why	.req	r8				@ Linux syscall (!= 0)
 tsk	.req	r7				@ current task
-
-
diff -urN linux-2.4.29/arch/armnommu/kernel/head-armv.S linux-2.4.x/arch/armnommu/kernel/head-armv.S
--- linux-2.4.29/arch/armnommu/kernel/head-armv.S	2005-11-22 18:33:59.000000000 +0000
+++ linux-2.4.x/arch/armnommu/kernel/head-armv.S	2005-11-22 18:43:49.000000000 +0000
@@ -90,6 +90,30 @@
 		b	vector_FIQ		/* 0x1C FIQ */
 99:
 #endif
+
+#if defined(CONFIG_MACH_EB67XDIP)
+		B	go			/* 0x00 */
+		MOV	r0, r0			/* 0x04 */
+		MOV	r0, r0			/* 0x08 */
+		MOV	r0, r0			/* 0x0C */
+		MOV	r0, r0			/* 0x10 */
+		MOV	r0, r0			/* 0x14 */
+		MOV	r0, r0			/* 0x18 */
+		MOV	r0, r0			/* 0x1C */
+		MOV	r0, r0			/* 0x20 */
+	
+		.word	0x016f2818
+                .word   stext           @ absolute load/run Image address
+                .word   _edata          @ Image end address
+		.ascii	"UCLX"
+		.align
+
+go:	
+		@@ boot loader should have placed r1 ok
+	
+			
+#endif	
+	
                 mov	r12, r0
 /*
  * NOTE!  Any code which is placed here should be done for one of
@@ -213,6 +237,47 @@
 		mov	r0, #F_BIT | I_BIT | MODE_SVC	@ make sure svc mode
 		msr	cpsr_c, r0			@ and all irqs disabled
 
+
+#if defined(CONFIG_MACH_EB67XDIP)
+
+        adr	r5, LC0
+        ldmia	r5, {r5, r6, r8, r9, sp}			@ Setup stack
+
+        /*  Copy data sections to their new home.  */
+
+
+        /*  Clear BSS */
+        mov	r4, #0
+1:      cmp	r5, r8					
+        strcc	r4, [r5],#4
+        bcc	1b
+
+        /*  Pretend we know what our processor code is (for arm_id)   */
+
+	@@ r2 = cpu type
+	ldr	r2, LC0 - 4
+	str     r2, [r6]
+	str     r1, [r9]
+
+        mov	fp, #0
+        b	start_kernel
+
+#ifdef CONFIG_CPU_OKIM67400X
+	.word	0x674001
+#endif
+#ifdef CONFIG_CPU_OKIM67500X
+	.word	0x675001
+#endif
+LC0:	.long	__bss_start
+        .long	processor_id
+        .long	_end
+	.long   __machine_arch_type
+        .long	init_task_union+8192
+	
+
+
+#endif
+	
 #if defined(CONFIG_ARCH_ATMEL)
 
         adr	r5, LC0
diff -urN linux-2.4.29/arch/armnommu/kernel/setup.c linux-2.4.x/arch/armnommu/kernel/setup.c
--- linux-2.4.29/arch/armnommu/kernel/setup.c	2005-11-22 18:33:59.000000000 +0000
+++ linux-2.4.x/arch/armnommu/kernel/setup.c	2005-11-22 18:43:49.000000000 +0000
@@ -516,6 +516,9 @@
 #ifdef CONFIG_ARCH_CNXT
 	unsigned long memory_end = END_MEM;
 #endif
+#ifdef CONFIG_MACH_EB67XDIP
+	tags = (struct tag *)0x100;    /* tags in RAM from bootloader */
+#endif
 	
 	ROOT_DEV = MKDEV(0, 255);
 
@@ -599,6 +602,18 @@
 	free_bootmem(memory_start, END_MEM - memory_start);
 	reserve_bootmem(memory_start, bootmap_size);
 #endif
+
+	if (DRAM_BASE == 0x00) {
+		/* reserve page zero for the vectors if we have
+		 * DRAM starting at zero, otherwise we end up
+		 * trying to give page zero to other parts of the
+		 * kernel (bjd)
+		 */
+
+		printk("Reserving page zero for vector table\n");
+		reserve_bootmem(0x0000, 0x07fff);
+	}
+
 	paging_init(&meminfo, mdesc);		// mem_map is set up here! 
 	request_standard_resources(&meminfo, mdesc);
 
@@ -688,4 +703,3 @@
 	stop:	c_stop,
 	show:	show_cpuinfo,
 };
-
diff -urN linux-2.4.29/arch/armnommu/mach-okim67x/Makefile linux-2.4.x/arch/armnommu/mach-okim67x/Makefile
--- linux-2.4.29/arch/armnommu/mach-okim67x/Makefile	1970-01-01 01:00:00.000000000 +0100
+++ linux-2.4.x/arch/armnommu/mach-okim67x/Makefile	2005-11-22 18:43:49.000000000 +0000
@@ -0,0 +1,21 @@
+#
+# Makefile for the linux kernel.
+#
+# Note! Dependencies are done automagically by 'make dep', which also
+# removes any old dependencies. DON'T put your own dependencies here
+# unless it's something special (ie not a .c file).
+
+USE_STANDARD_AS_RULE := true
+
+O_TARGET		:= okim67x.o
+
+# Object file lists.
+
+obj-y			:= $(patsubst %.c, %.o, $(wildcard *.c))
+obj-m			:=
+obj-n			:=
+obj-			:=
+
+export-objs		:= 
+
+include $(TOPDIR)/Rules.make
diff -urN linux-2.4.29/arch/armnommu/mach-okim67x/arch.c linux-2.4.x/arch/armnommu/mach-okim67x/arch.c
--- linux-2.4.29/arch/armnommu/mach-okim67x/arch.c	1970-01-01 01:00:00.000000000 +0100
+++ linux-2.4.x/arch/armnommu/mach-okim67x/arch.c	2005-11-22 18:43:49.000000000 +0000
@@ -0,0 +1,148 @@
+/*
+ *  linux/arch/arm/mach-okim67x/arch.c
+ *
+ *  (c)2005 Simtec Electronics
+ *
+ *  Architecture specific fixups.  This is where any
+ *  parameters in the params struct are fixed up, or
+ *  any additional architecture specific information
+ *  is pulled from the params struct.
+ */
+#include <linux/tty.h>
+#include <linux/delay.h>
+#include <linux/pm.h>
+#include <linux/init.h>
+#include <linux/config.h>
+
+#include <asm/elf.h>
+#include <asm/setup.h>
+#include <asm/mach-types.h>
+#include <asm/mach/arch.h>
+
+#include <asm/arch/hardware.h>
+#include <asm/arch/cache.h>
+#include <asm/io.h>
+
+extern void genarch_init_irq(void);
+
+int oki_ml67500x = 0;
+int oki_ml67400x = 0;
+
+int oki_clk  = 0;   /* master crystal requency */
+int oki_hclk = 0;
+int oki_cclk = 0;
+
+static void
+oki_ml67500x_init_cache(void)
+{
+	unsigned long flags;
+	unsigned long cache;
+	int i;
+
+	local_irq_save(flags);
+
+	if (__raw_readl(OKI_CACHE_EN) != 0) {
+		printk("M675001: Cache already enabled\n");
+
+		local_irq_save(flags);
+
+		cache = __raw_readl(OKI_CACHE_EN);
+		cache |= CACHE_EN_C0;
+
+		__raw_writel(cache, OKI_CACHE_EN);
+	} else {
+		
+		printk("M675001: Enabling CPU cache\n");
+		
+		/* flush and init cache */
+		
+		__raw_writel(0x00, OKI_CACHE_EN);
+		__raw_writel(0x00, OKI_CACHE_CON);
+		__raw_writel(CACHE_FLUSH_FLUSH, OKI_CACHE_FLUSH);
+		
+		for (i = 0; i < 128; i++) {
+			__raw_readw(0x00);
+		}
+		
+		/* enable cache for bank0 */
+		__raw_writel(CACHE_EN_C0, OKI_CACHE_EN);
+	}
+
+	local_irq_restore(flags);
+}
+
+void
+oki_fixup(struct machine_desc *mdesc,
+	  struct param_struct *param,
+	  char **arg,
+	  struct meminfo *meminfo)
+{
+  unsigned int bwc, tmp;
+  unsigned int clk;
+
+  /* need to determine which version of the cpu this is */
+
+  bwc = __raw_readl(OKI_BWC);
+
+  tmp = bwc & ~(3<<8);   /* IO23BW */
+
+  if (tmp != bwc) {
+    printk("CPU is ML67400x series\n");
+
+    oki_ml67400x = 1;
+    oki_ml67500x = 0;
+    oki_clk      = 25*1000*1000;
+  } else {
+    printk("CPU is ML67500x series\n");
+
+    oki_ml67400x = 0;
+    oki_ml67500x = 1;
+    oki_clk      = 7372800*8;
+
+    oki_ml67500x_init_cache();
+  }
+
+  clk = __raw_readl(OKI_CGBCNT0);
+
+#ifdef CONFIG_OKI_CCLK_HAVLED
+
+#define OKI_RFRSH1 (0x7818001c)
+
+  /* halve the cclk value */
+ 
+  {
+	  unsigned int refresh1 = __raw_readl(OKI_RFRSH1);
+
+	  refresh1 /= 2;
+
+	  __raw_writel(refresh1, OKI_RFRSH1); 
+  }
+
+  {
+	  unsigned int div_c = (clk >> 4) & 7;	  
+
+	  div_c++;
+
+	  clk &= ~(7<<4);
+	  clk |= (div_c << 4);
+
+	  __raw_writel(0x03c, OKI_CGBCNT0);
+	  __raw_writel(clk, OKI_CGBCNT0);
+  }
+#endif
+
+  oki_hclk = oki_clk /  OKI_CLKGR_H(clk);
+  oki_cclk = oki_clk /  OKI_CLKGR_C(clk);
+
+#define print_mhz(x) ((x) / 1000000), (((x) / 1000) % 1000)
+
+  printk("OKI: Clk %d.%3d MHz, HClk %d.%3d MHz, CCLk %d.%3d MHz\n",
+	 print_mhz(oki_clk), print_mhz(oki_hclk), print_mhz(oki_cclk));
+
+}
+
+MACHINE_START(EB67XDIP, "EB67X001DIP")
+       MAINTAINER("Vincent Sanders, Ben Dooks")
+       INITIRQ(genarch_init_irq)
+       FIXUP(oki_fixup)
+MACHINE_END
diff -urN linux-2.4.29/arch/armnommu/mach-okim67x/irq.c linux-2.4.x/arch/armnommu/mach-okim67x/irq.c
--- linux-2.4.29/arch/armnommu/mach-okim67x/irq.c	1970-01-01 01:00:00.000000000 +0100
+++ linux-2.4.x/arch/armnommu/mach-okim67x/irq.c	2005-11-22 18:43:49.000000000 +0000
@@ -0,0 +1,158 @@
+/*
+ *  linux/arch/arm/mach-okim67x/irq.c
+ *
+ *  Copyright (C) 2005 Simtec Electronics
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+#include <linux/init.h>
+
+#include <asm/mach/irq.h>
+#include <asm/hardware.h>
+#include <asm/io.h>
+#include <asm/irq.h>
+#include <asm/system.h>
+
+extern struct irqdesc irq_desc[];
+
+#define IS_ILC0 (0 << 24)
+#define IS_ILC1 (1 << 24)
+#define IS_ILC  (2 << 24)
+
+#define IS_ILR0 (0x00)
+#define IS_ILR1 (0x04)
+#define IS_ILR4 (0x10)
+#define IS_ILR6 (0x18)
+#define IS_ILR8 (0x00)
+#define IS_ILR9 (0x04)
+#define IS_ILR10 (0x08)
+#define IS_ILR11 (0x0C)
+#define IS_ILR12 (0x10)
+#define IS_ILR13 (0x14)
+#define IS_ILR14 (0x18)
+#define IS_ILR15 (0x1C)
+#define IS_ILC16 (0x00)
+#define IS_ILC18 (0x04)
+#define IS_ILC20 (0x08)
+#define IS_ILC22 (0x0c)
+#define IS_ILC24 (0x10)
+#define IS_ILC26 (0x14)
+#define IS_ILC28 (0x18)
+#define IS_ILC30 (0x1c)
+
+#define PRIO(x)  ((x) << 16)
+
+#define __arch_writel(data,addr) \
+  do { *((volatile unsigned int *)(addr)) = (data); } while(0)
+
+#define __arch_readl(addr) ((*((volatile unsigned int *)(addr))))
+
+static unsigned int irqtab[32] = {
+  IS_ILC0 | PRIO(1) | IS_ILR0,             /* 0 */
+  IS_ILC0 | PRIO(1) | IS_ILR1,             /* 1 */
+  IS_ILC0 | PRIO(1) | IS_ILR1,             /* 2 */
+  IS_ILC0 | PRIO(1) | IS_ILR1,             /* 3 */
+  IS_ILC0 | PRIO(1) | IS_ILR4,             /* 4 */
+  IS_ILC0 | PRIO(1) | IS_ILR4,             /* 5 */
+  IS_ILC0 | PRIO(1) | IS_ILR6,             /* 6 */
+  IS_ILC0 | PRIO(1) | IS_ILR6,             /* 7 */
+  IS_ILC1 | PRIO(1) | IS_ILR8,             /* 8 */
+  IS_ILC1 | PRIO(1) | IS_ILR9,             /* 9 */
+  IS_ILC1 | PRIO(5) | IS_ILR10,            /* 10 */
+  IS_ILC1 | PRIO(1) | IS_ILR11,            /* 11 */
+  IS_ILC1 | PRIO(1) | IS_ILR12,            /* 12 */
+  IS_ILC1 | PRIO(1) | IS_ILR13,            /* 13 */
+  IS_ILC1 | PRIO(1) | IS_ILR14,            /* 14 */
+  IS_ILC1 | PRIO(1) | IS_ILR15,            /* 15 */
+  IS_ILC  | PRIO(1) | IS_ILC16,            /* 16 */
+  IS_ILC  | PRIO(1) | IS_ILC16,            /* 17 */
+  IS_ILC  | PRIO(1) | IS_ILC18,            /* 18 */
+  IS_ILC  | PRIO(1) | IS_ILC18,            /* 19 */
+  IS_ILC  | PRIO(1) | IS_ILC20,            /* 20 */
+  IS_ILC  | PRIO(1) | IS_ILC20,            /* 21 */
+  IS_ILC  | PRIO(1) | IS_ILC22,            /* 22 */
+  IS_ILC  | PRIO(1) | IS_ILC22,            /* 23 */
+  IS_ILC  | PRIO(1) | IS_ILC24,            /* 24 */
+  IS_ILC  | PRIO(1) | IS_ILC24,            /* 25 */
+  IS_ILC  | PRIO(1) | IS_ILC26,            /* 26 */
+  IS_ILC  | PRIO(1) | IS_ILC26,            /* 27 */
+  IS_ILC  | PRIO(1) | IS_ILC28,            /* 28 */
+  IS_ILC  | PRIO(1) | IS_ILC28,            /* 29 */
+  IS_ILC  | PRIO(1) | IS_ILC30,            /* 30 */
+  IS_ILC  | PRIO(1) | IS_ILC30,            /* 31 */
+};
+
+static int irqregs[] = {
+  OKI_ILC0,
+  OKI_ILC1,
+  OKI_ILC
+};
+
+#define irqreg(x) (irqregs[ ((x) >> 24)] )
+#define irqpos(x) ((x) & 0xff)
+#define irqprio(x) (((x) >> 16) & 0xff)
+
+void m67x_mask_irq(unsigned int irq)
+{
+  unsigned int irqinf = irqtab[irq];
+  unsigned int irqreg = irqreg(irqinf);
+  unsigned int tmp;
+
+  //printk("mask %d\n", irq);
+
+  tmp = __arch_readl(irqreg);
+  tmp &= ~(irqprio(irqinf) << irqpos(irqinf));
+
+  __arch_writel(tmp, irqreg);
+}
+
+void m67x_unmask_irq(unsigned int irq)
+{
+  unsigned int irqinf = irqtab[irq];
+  unsigned int irqreg = irqreg(irqinf);
+  unsigned int tmp;
+
+  //printk("unmask %d\n", irq);
+
+  tmp = __arch_readl(irqreg);
+  tmp &= ~(irqprio(irqinf) << irqpos(irqinf));
+  tmp |= irqprio(irqinf) << irqpos(irqinf);
+
+  //printk("unask: r=%08x, v=%08x\n", irqreg, tmp);
+
+  __arch_writel(tmp, irqreg);
+}
+
+void m67x_mask_ack_irq(unsigned int irq)
+{
+  unsigned int irqinf = irqtab[irq];
+  unsigned int irqreg = irqreg(irqinf);
+
+  //printk("mask ack %d\n", irq);
+
+  m67x_mask_irq(irq);
+
+  __arch_writel(1<<(irqprio(irqinf) - 1), OKI_CILCL);
+
+}
+
+void m67x_init_aic(void)
+{
+  printk("clearing irq controller\n");
+
+  __arch_writel(0x00, OKI_ILC0);
+  __arch_writel(0x00, OKI_ILC1);
+
+}
diff -urN linux-2.4.29/arch/armnommu/mm/Makefile linux-2.4.x/arch/armnommu/mm/Makefile
--- linux-2.4.29/arch/armnommu/mm/Makefile	2005-11-22 18:34:00.000000000 +0000
+++ linux-2.4.x/arch/armnommu/mm/Makefile	2005-11-22 18:43:49.000000000 +0000
@@ -50,6 +50,9 @@
 p-$(CONFIG_CPU_ARM740T) += proc-arm740.o
 p-$(CONFIG_CPU_ARM920T)	+= proc-arm920.o
 
+p-$(CONFIG_CPU_OKIM67400X) += proc-oki-ml674001.o
+p-$(CONFIG_CPU_OKIM67500X) += proc-oki-ml675001.o
+
 ifeq ($(CONFIG_CPU_S3C2500),y)
  p-$(CONFIG_CPU_ARM940T) += proc-arm940T.o
 else
diff -urN linux-2.4.29/arch/armnommu/mm/proc-oki-ml674001.S linux-2.4.x/arch/armnommu/mm/proc-oki-ml674001.S
--- linux-2.4.29/arch/armnommu/mm/proc-oki-ml674001.S	1970-01-01 01:00:00.000000000 +0100
+++ linux-2.4.x/arch/armnommu/mm/proc-oki-ml674001.S	2005-11-22 18:43:49.000000000 +0000
@@ -0,0 +1,431 @@
+/*
+ *  linux/arch/arm/mm/proc-oki_ml67400x.S: MMU functions for OKI_ML67400X
+ *
+ *  Copyright (C) 2000 Steve Hill (sjhill@cotw.com)
+ *                     Rob Scott (rscott@mtrob.fdns.net)
+ *  Copyright (C) 2000 ARM Limited, Deep Blue Solutions Ltd.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ *
+ *
+ * These are the low level assembler for performing cache and TLB
+ * functions on the ARM720T.  The ARM720T has a writethrough IDC
+ * cache, so we don't need to clean it.
+ *
+ *  Changelog:
+ *   05-09-2000 SJH	Created by moving 720 specific functions
+ *			out of 'proc-arm6,7.S' per RMK discussion
+ *   07-25-2000 SJH	Added idle function.
+ *   08-25-2000	DBS	Updated for integration of ARM Ltd version.
+ *   12-03-2001 FG      Forked 740 function from 720
+ *   10-04-2003 BJD     Forked Oki from 740
+ */
+#include <linux/linkage.h>
+#include <asm/assembler.h>
+#include <asm/constants.h>
+#include <asm/procinfo.h>
+#include <asm/hardware.h>
+
+/*
+ * Function: oki_ml67400x_cache_clean_invalidate_all (void)
+ *	   : oki_ml67400x_cache_clean_invalidate_page (unsigned long address, int size,
+ *                                    int flags)
+ *
+ * Params  : address	Area start address
+ *	   : size	size of area
+ *	   : flags	b0 = I cache as well
+ *
+ * Purpose : Flush all cache lines
+ */
+ENTRY(cpu_oki_ml67400x_cache_clean_invalidate_all)
+ENTRY(cpu_oki_ml67400x_cache_clean_invalidate_range)
+ENTRY(cpu_oki_ml67400x_icache_invalidate_range)
+ENTRY(cpu_oki_ml67400x_icache_invalidate_page)
+ENTRY(cpu_oki_ml67400x_dcache_invalidate_range)
+		mov	pc, lr
+
+/*
+ * These just expect cache lines to be cleaned.  Since we have a writethrough
+ * cache, we never have any dirty cachelines to worry about.
+ */
+ENTRY(cpu_oki_ml67400x_dcache_clean_range)
+ENTRY(cpu_oki_ml67400x_dcache_clean_page)
+ENTRY(cpu_oki_ml67400x_dcache_clean_entry)
+ENTRY(cpu_oki_ml67400x_flush_ram_page)
+		mov	pc, lr
+
+/*
+ * Function: oki_ml67400x_tlb_invalidate_all (void)
+ *
+ * Purpose : flush all TLB entries in all caches
+ */
+ENTRY(cpu_oki_ml67400x_tlb_invalidate_all)
+		mov	r0, #0
+		mcr	p15, 0, r0, c8, c7, 0		@ flush TLB (v4)
+		mov	pc, lr
+
+/*
+ * Function: oki_ml67400x_tlb_invalidate_page (unsigned long address, int end, int flags)
+ *
+ * Params  : address	Area start address
+ *	   : end	Area end address
+ *	   : flags	b0 = I cache as well
+ *
+ * Purpose : flush a TLB entry
+ */
+ENTRY(cpu_oki_ml67400x_tlb_invalidate_range)
+		mov	pc, lr
+
+/*
+ * Function: oki_ml67400x_tlb_invalidate_page (unsigned long address, int flags)
+ *
+ * Params  : address	Address
+ *	   : flags	b0 = I-TLB as well
+ *
+ * Purpose : flush a TLB entry
+ */
+ENTRY(cpu_oki_ml67400x_tlb_invalidate_page)
+		mcr	p15, 0, r0, c8, c7, 1		@ flush TLB (v4)
+		mov	pc, lr
+
+/*
+ * Function: oki_ml67400x_data_abort ()
+ *
+ * Params  : r0 = address of aborted instruction
+ *
+ * Purpose : obtain information about current aborted instruction
+ *
+ * Returns : r0 = address of abort
+ *	   : r1 != 0 if writing
+ *	   : r3 = FSR
+ *	   : sp = pointer to registers
+ */
+
+Ldata_ldmstm:	tst	r4, #1 << 21			@ check writeback bit
+		beq	Ldata_simple
+		mov	r7, #0x11
+		orr	r7, r7, r7, lsl #8
+		and	r0, r4, r7
+		and	r2, r4, r7, lsl #1
+		add	r0, r0, r2, lsr #1
+		and	r2, r4, r7, lsl #2
+		add	r0, r0, r2, lsr #2
+		and	r2, r4, r7, lsl #3
+		add	r0, r0, r2, lsr #3
+		add	r0, r0, r0, lsr #8
+		add	r0, r0, r0, lsr #4
+		and	r7, r0, #15			@ r7 = no. of registers to transfer.
+		and	r5, r4, #15 << 16		@ Get Rn
+		ldr	r0, [sp, r5, lsr #14]		@ Get register
+		tst	r4, #1 << 23			@ U bit
+		subne	r7, r0, r7, lsl #2
+		addeq	r7, r0, r7, lsl #2		@ Do correction (signed)
+Ldata_saver7:	str	r7, [sp, r5, lsr #14]		@ Put register
+Ldata_simple:	mrc	p15, 0, r0, c6, c0, 0		@ get FAR
+		mrc	p15, 0, r3, c5, c0, 0		@ get FSR
+		and	r3, r3, #255
+		mov	pc, lr
+
+ENTRY(cpu_oki_ml67400x_data_abort)
+		ldr	r4, [r0]			@ read instruction causing problem
+		tst	r4, r4, lsr #21			@ C = bit 20
+		sbc	r1, r1, r1			@ r1 = C - 1
+		and	r2, r4, #15 << 24
+		add	pc, pc, r2, lsr #22		@ Now branch to the relevent processing routine
+		movs	pc, lr
+
+		b	Ldata_lateldrhpost		@ ldrh	rd, [rn], #m/rm
+		b	Ldata_lateldrhpre		@ ldrh	rd, [rn, #m/rm]
+		b	Ldata_unknown
+		b	Ldata_unknown
+		b	Ldata_lateldrpostconst		@ ldr	rd, [rn], #m
+		b	Ldata_lateldrpreconst		@ ldr	rd, [rn, #m] 
+		b	Ldata_lateldrpostreg		@ ldr	rd, [rn], rm
+		b	Ldata_lateldrprereg		@ ldr	rd, [rn, rm]
+		b	Ldata_ldmstm			@ ldm*a	rn, <rlist>
+		b	Ldata_ldmstm			@ ldm*b	rn, <rlist>
+		b	Ldata_unknown
+		b	Ldata_unknown
+		b	Ldata_simple			@ ldc	rd, [rn], #m	@ Same as ldr	rd, [rn], #m
+		b	Ldata_simple			@ ldc	rd, [rn, #m]
+		b	Ldata_unknown
+
+Ldata_unknown:	@ Part of jumptable
+		mov	r0, r2
+		mov	r1, r4
+		mov	r2, r3
+		bl	baddataabort
+		b	ret_from_exception
+
+Ldata_lateldrhpre:
+		tst	r4, #1 << 21			@ check writeback bit
+		beq	Ldata_simple
+Ldata_lateldrhpost:
+		and	r5, r4, #0x00f			@ get Rm / low nibble of immediate value
+		tst	r4, #1 << 22			@ if (immediate offset)
+		andne	r2, r4, #0xf00			@ { immediate high nibble
+		orrne	r2, r5, r2, lsr #4		@   combine nibbles } else
+		ldreq	r2, [sp, r5, lsl #2]		@ { load Rm value }
+		and	r5, r4, #15 << 16		@ get Rn
+		ldr	r0, [sp, r5, lsr #14]		@ load Rn value
+		tst	r4, #1 << 23			@ U bit
+		subne	r7, r0, r2
+		addeq	r7, r0, r2
+		b	Ldata_saver7
+
+Ldata_lateldrpreconst:
+		tst	r4, #1 << 21			@ check writeback bit
+		beq	Ldata_simple
+Ldata_lateldrpostconst:
+		movs	r2, r4, lsl #20			@ Get offset
+		beq	Ldata_simple
+		and	r5, r4, #15 << 16		@ Get Rn
+		ldr	r0, [sp, r5, lsr #14]
+		tst	r4, #1 << 23			@ U bit
+		subne	r7, r0, r2, lsr #20
+		addeq	r7, r0, r2, lsr #20
+		b	Ldata_saver7
+
+Ldata_lateldrprereg:
+		tst	r4, #1 << 21			@ check writeback bit
+		beq	Ldata_simple
+Ldata_lateldrpostreg:
+		and	r5, r4, #15
+		ldr	r2, [sp, r5, lsl #2]		@ Get Rm
+		mov	r3, r4, lsr #7
+		ands	r3, r3, #31
+		and	r6, r4, #0x70
+		orreq	r6, r6, #8
+		add	pc, pc, r6
+		mov	r0, r0
+
+		mov	r2, r2, lsl r3			@ 0: LSL #!0
+		b	1f
+		b	1f				@ 1: LSL #0
+		mov	r0, r0
+		b	1f				@ 2: MUL?
+		mov	r0, r0
+		b	1f				@ 3: MUL?
+		mov	r0, r0
+		mov	r2, r2, lsr r3			@ 4: LSR #!0
+		b	1f
+		mov	r2, r2, lsr #32			@ 5: LSR #32
+		b	1f
+		b	1f				@ 6: MUL?
+		mov	r0, r0
+		b	1f				@ 7: MUL?
+		mov	r0, r0
+		mov	r2, r2, asr r3			@ 8: ASR #!0
+		b	1f
+		mov	r2, r2, asr #32			@ 9: ASR #32
+		b	1f
+		b	1f				@ A: MUL?
+		mov	r0, r0
+		b	1f				@ B: MUL?
+		mov	r0, r0
+		mov	r2, r2, ror r3			@ C: ROR #!0
+		b	1f
+		mov	r2, r2, rrx			@ D: RRX
+		b	1f
+		mov	r0, r0				@ E: MUL?
+		mov	r0, r0
+		mov	r0, r0				@ F: MUL?
+
+
+1:		and	r5, r4, #15 << 16		@ Get Rn
+		ldr	r0, [sp, r5, lsr #14]
+		tst	r4, #1 << 23			@ U bit
+		subne	r7, r0, r2
+		addeq	r7, r0, r2
+		b	Ldata_saver7
+
+/*
+ * Function: oki_ml67400x_check_bugs (void)
+ *	   : oki_ml67400x_proc_init (void)
+ *	   : oki_ml67400x_proc_fin (void)
+ *
+ * Notes   : This processor does not require these
+ */
+ENTRY(cpu_oki_ml67400x_check_bugs)
+		mrs	ip, cpsr
+		bic	ip, ip, #F_BIT
+		msr	cpsr, ip
+		mov	pc, lr
+
+ENTRY(cpu_oki_ml67400x_proc_init)
+		mov	pc, lr
+
+ENTRY(cpu_oki_ml67400x_proc_fin)
+		stmfd	sp!, {lr}
+		ldmfd	sp!, {pc}
+
+/*
+ * Function: oki_ml67400x_proc_do_idle(void)
+ * Params  : r0 = unused
+ * Purpose : put the processer in proper idle mode
+ */
+ENTRY(cpu_oki_ml67400x_do_idle)
+		mov	pc, lr
+
+/*
+ * Function: oki_ml67400x_set_pgd(unsigned long pgd_phys)
+ * Params  : pgd_phys	Physical address of page table
+ * Purpose : Perform a task switch, saving the old process' state and restoring
+ *	     the new.
+ */
+
+ENTRY(cpu_oki_ml67400x_set_pgd)
+	mov	pc, r14
+
+/*
+ * Function: oki_ml67400x_set_pmd ()
+ *
+ * Params  : r0 = Address to set
+ *	   : r1 = value to set
+ *
+ * Purpose : Set a PMD and flush it out of any WB cache
+ */
+ENTRY(cpu_oki_ml67400x_set_pmd)
+		tst	r1, #3
+		orrne	r1, r1, #16			@ Updatable bit is
+		str	r1, [r0]			@ always set on OKI_ML67X
+		mov	pc, lr
+	
+
+/*
+ * Function: oki_ml67400x_set_pte(pte_t *ptep, pte_t pte)
+ * Params  : r0 = Address to set
+ *	   : r1 = value to set
+ * Purpose : Set a PTE and flush it out of any WB cache
+ */
+		.align	5
+ENTRY(cpu_oki_ml67400x_set_pte)
+		str	r1, [r0], #-1024		@ linux version
+
+		eor	r1, r1, #LPTE_PRESENT | LPTE_YOUNG | LPTE_WRITE | LPTE_DIRTY
+
+		bic	r2, r1, #0xff0
+		bic	r2, r2, #3
+		orr	r2, r2, #HPTE_TYPE_SMALL
+
+		tst	r1, #LPTE_USER | LPTE_EXEC	@ User or Exec?
+		orrne	r2, r2, #HPTE_AP_READ
+
+		tst	r1, #LPTE_WRITE | LPTE_DIRTY	@ Write and Dirty?
+		orreq	r2, r2, #HPTE_AP_WRITE
+
+		tst	r1, #LPTE_PRESENT | LPTE_YOUNG	@ Present and Young
+		movne	r2, #0
+
+		str	r2, [r0]			@ hardware version
+		mov	pc, lr
+
+/*
+ * Function: oki_ml67400x_reset
+ * Params  : r0 = address to jump to
+ * Notes   : This sets up everything for a reset
+ */
+ENTRY(cpu_oki_ml67400x_reset)
+		mov	ip, #0
+
+		mov	pc, r0
+
+	
+cpu_armvlsi_name:
+		.asciz	"OKI"
+cpu_oki_ml67400x_name:
+		.asciz	"ML67400X"
+		.align
+
+		.section ".text.init", #alloc, #execinstr
+
+__oki_ml67400x_setup:
+
+@setup memory regions
+@ 	
+		mov	pc, lr				@ __ret (head-armv.S)
+
+/*
+ * Purpose : Function pointers used to access above functions - all calls
+ *	     come through these
+ */
+		.type	oki_ml674001_processor_functions, #object
+ENTRY(oki_ml67400x_processor_functions)
+		.word	cpu_oki_ml67400x_data_abort
+		.word	cpu_oki_ml67400x_check_bugs
+		.word	cpu_oki_ml67400x_proc_init
+		.word	cpu_oki_ml67400x_proc_fin
+		.word	cpu_oki_ml67400x_reset
+		.word	cpu_oki_ml67400x_do_idle
+
+		/* cache */
+		.word	cpu_oki_ml67400x_cache_clean_invalidate_all
+		.word	cpu_oki_ml67400x_cache_clean_invalidate_range
+		.word	cpu_oki_ml67400x_flush_ram_page
+
+		/* dcache */
+		.word	cpu_oki_ml67400x_dcache_invalidate_range
+		.word	cpu_oki_ml67400x_dcache_clean_range
+		.word	cpu_oki_ml67400x_dcache_clean_page
+		.word	cpu_oki_ml67400x_dcache_clean_entry
+
+		/* icache */
+		.word	cpu_oki_ml67400x_icache_invalidate_range
+		.word	cpu_oki_ml67400x_icache_invalidate_page
+
+		/* tlb */
+		.word	cpu_oki_ml67400x_tlb_invalidate_all
+		.word	cpu_oki_ml67400x_tlb_invalidate_range
+		.word	cpu_oki_ml67400x_tlb_invalidate_page
+
+		/* pgtable */
+		.word	cpu_oki_ml67400x_set_pgd
+		.word	cpu_oki_ml67400x_set_pmd
+		.word	cpu_oki_ml67400x_set_pte
+		.size	oki_ml67400x_processor_functions, . - oki_ml67400x_processor_functions
+
+		.type	cpu_oki_ml67400x_info, #object
+cpu_oki_ml67400x_info:
+		.long	cpu_armvlsi_name
+		.long	cpu_oki_ml67400x_name
+		.size	cpu_oki_ml67400x_info, . - cpu_oki_ml67400x_info
+	
+		.type	cpu_arch_name, #object
+cpu_arch_name:	.asciz	"armv4"
+		.size	cpu_arch_name, . - cpu_arch_name
+
+		.type	cpu_elf_name, #object
+cpu_elf_name:	.asciz	"v4"
+		.size	cpu_elf_name, . - cpu_elf_name
+		.align
+
+/*
+ * See /include/asm-arm for a definition of this structure.
+ */
+	
+		.section ".proc.info", #alloc, #execinstr
+
+		.type	__oki_ml67400x_proc_info, #object
+__oki_ml67400x_proc_info:
+		.long	0x00674000				@ cpu_val
+		.long	0xfffffff0				@ cpu_mask
+		.long	0x00000c1e				@ section_mmu_flags
+		b	__oki_ml67400x_setup				@ cpu_flush
+		.long	cpu_arch_name				@ arch_name
+		.long	cpu_elf_name				@ elf_name
+		.long	HWCAP_SWP | HWCAP_HALF | HWCAP_26BIT	@ elf_hwcap
+		.long	cpu_oki_ml67400x_info				@ info
+		.long	oki_ml67400x_processor_functions
+		.size	__oki_ml67400x_proc_info, . - __oki_ml67400x_proc_info
diff -urN linux-2.4.29/arch/armnommu/mm/proc-oki-ml675001.S linux-2.4.x/arch/armnommu/mm/proc-oki-ml675001.S
--- linux-2.4.29/arch/armnommu/mm/proc-oki-ml675001.S	1970-01-01 01:00:00.000000000 +0100
+++ linux-2.4.x/arch/armnommu/mm/proc-oki-ml675001.S	2005-11-22 18:43:49.000000000 +0000
@@ -0,0 +1,431 @@
+/*
+ *  linux/arch/arm/mm/proc-oki_ml67400x.S: MMU functions for OKI_ML67400X
+ *
+ *  Copyright (C) 2000 Steve Hill (sjhill@cotw.com)
+ *                     Rob Scott (rscott@mtrob.fdns.net)
+ *  Copyright (C) 2000 ARM Limited, Deep Blue Solutions Ltd.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ *
+ *
+ * These are the low level assembler for performing cache and TLB
+ * functions on the ARM720T.  The ARM720T has a writethrough IDC
+ * cache, so we don't need to clean it.
+ *
+ *  Changelog:
+ *   05-09-2000 SJH	Created by moving 720 specific functions
+ *			out of 'proc-arm6,7.S' per RMK discussion
+ *   07-25-2000 SJH	Added idle function.
+ *   08-25-2000	DBS	Updated for integration of ARM Ltd version.
+ *   12-03-2001 FG      Forked 740 function from 720
+ *   10-04-2003 BJD     Forked Oki from 740
+ */
+#include <linux/linkage.h>
+#include <asm/assembler.h>
+#include <asm/constants.h>
+#include <asm/procinfo.h>
+#include <asm/hardware.h>
+
+/*
+ * Function: oki_ml67500x_cache_clean_invalidate_all (void)
+ *	   : oki_ml67500x_cache_clean_invalidate_page (unsigned long address, int size,
+ *                                    int flags)
+ *
+ * Params  : address	Area start address
+ *	   : size	size of area
+ *	   : flags	b0 = I cache as well
+ *
+ * Purpose : Flush all cache lines
+ */
+ENTRY(cpu_oki_ml67500x_cache_clean_invalidate_all)
+ENTRY(cpu_oki_ml67500x_cache_clean_invalidate_range)
+ENTRY(cpu_oki_ml67500x_icache_invalidate_range)
+ENTRY(cpu_oki_ml67500x_icache_invalidate_page)
+ENTRY(cpu_oki_ml67500x_dcache_invalidate_range)
+		mov	pc, lr
+
+/*
+ * These just expect cache lines to be cleaned.  Since we have a writethrough
+ * cache, we never have any dirty cachelines to worry about.
+ */
+ENTRY(cpu_oki_ml67500x_dcache_clean_range)
+ENTRY(cpu_oki_ml67500x_dcache_clean_page)
+ENTRY(cpu_oki_ml67500x_dcache_clean_entry)
+ENTRY(cpu_oki_ml67500x_flush_ram_page)
+		mov	pc, lr
+
+/*
+ * Function: oki_ml67500x_tlb_invalidate_all (void)
+ *
+ * Purpose : flush all TLB entries in all caches
+ */
+ENTRY(cpu_oki_ml67500x_tlb_invalidate_all)
+		mov	r0, #0
+		mcr	p15, 0, r0, c8, c7, 0		@ flush TLB (v4)
+		mov	pc, lr
+
+/*
+ * Function: oki_ml67500x_tlb_invalidate_page (unsigned long address, int end, int flags)
+ *
+ * Params  : address	Area start address
+ *	   : end	Area end address
+ *	   : flags	b0 = I cache as well
+ *
+ * Purpose : flush a TLB entry
+ */
+ENTRY(cpu_oki_ml67500x_tlb_invalidate_range)
+		mov	pc, lr
+
+/*
+ * Function: oki_ml67500x_tlb_invalidate_page (unsigned long address, int flags)
+ *
+ * Params  : address	Address
+ *	   : flags	b0 = I-TLB as well
+ *
+ * Purpose : flush a TLB entry
+ */
+ENTRY(cpu_oki_ml67500x_tlb_invalidate_page)
+		mcr	p15, 0, r0, c8, c7, 1		@ flush TLB (v4)
+		mov	pc, lr
+
+/*
+ * Function: oki_ml67500x_data_abort ()
+ *
+ * Params  : r0 = address of aborted instruction
+ *
+ * Purpose : obtain information about current aborted instruction
+ *
+ * Returns : r0 = address of abort
+ *	   : r1 != 0 if writing
+ *	   : r3 = FSR
+ *	   : sp = pointer to registers
+ */
+
+Ldata_ldmstm:	tst	r4, #1 << 21			@ check writeback bit
+		beq	Ldata_simple
+		mov	r7, #0x11
+		orr	r7, r7, r7, lsl #8
+		and	r0, r4, r7
+		and	r2, r4, r7, lsl #1
+		add	r0, r0, r2, lsr #1
+		and	r2, r4, r7, lsl #2
+		add	r0, r0, r2, lsr #2
+		and	r2, r4, r7, lsl #3
+		add	r0, r0, r2, lsr #3
+		add	r0, r0, r0, lsr #8
+		add	r0, r0, r0, lsr #4
+		and	r7, r0, #15			@ r7 = no. of registers to transfer.
+		and	r5, r4, #15 << 16		@ Get Rn
+		ldr	r0, [sp, r5, lsr #14]		@ Get register
+		tst	r4, #1 << 23			@ U bit
+		subne	r7, r0, r7, lsl #2
+		addeq	r7, r0, r7, lsl #2		@ Do correction (signed)
+Ldata_saver7:	str	r7, [sp, r5, lsr #14]		@ Put register
+Ldata_simple:	mrc	p15, 0, r0, c6, c0, 0		@ get FAR
+		mrc	p15, 0, r3, c5, c0, 0		@ get FSR
+		and	r3, r3, #255
+		mov	pc, lr
+
+ENTRY(cpu_oki_ml67500x_data_abort)
+		ldr	r4, [r0]			@ read instruction causing problem
+		tst	r4, r4, lsr #21			@ C = bit 20
+		sbc	r1, r1, r1			@ r1 = C - 1
+		and	r2, r4, #15 << 24
+		add	pc, pc, r2, lsr #22		@ Now branch to the relevent processing routine
+		movs	pc, lr
+
+		b	Ldata_lateldrhpost		@ ldrh	rd, [rn], #m/rm
+		b	Ldata_lateldrhpre		@ ldrh	rd, [rn, #m/rm]
+		b	Ldata_unknown
+		b	Ldata_unknown
+		b	Ldata_lateldrpostconst		@ ldr	rd, [rn], #m
+		b	Ldata_lateldrpreconst		@ ldr	rd, [rn, #m] 
+		b	Ldata_lateldrpostreg		@ ldr	rd, [rn], rm
+		b	Ldata_lateldrprereg		@ ldr	rd, [rn, rm]
+		b	Ldata_ldmstm			@ ldm*a	rn, <rlist>
+		b	Ldata_ldmstm			@ ldm*b	rn, <rlist>
+		b	Ldata_unknown
+		b	Ldata_unknown
+		b	Ldata_simple			@ ldc	rd, [rn], #m	@ Same as ldr	rd, [rn], #m
+		b	Ldata_simple			@ ldc	rd, [rn, #m]
+		b	Ldata_unknown
+
+Ldata_unknown:	@ Part of jumptable
+		mov	r0, r2
+		mov	r1, r4
+		mov	r2, r3
+		bl	baddataabort
+		b	ret_from_exception
+
+Ldata_lateldrhpre:
+		tst	r4, #1 << 21			@ check writeback bit
+		beq	Ldata_simple
+Ldata_lateldrhpost:
+		and	r5, r4, #0x00f			@ get Rm / low nibble of immediate value
+		tst	r4, #1 << 22			@ if (immediate offset)
+		andne	r2, r4, #0xf00			@ { immediate high nibble
+		orrne	r2, r5, r2, lsr #4		@   combine nibbles } else
+		ldreq	r2, [sp, r5, lsl #2]		@ { load Rm value }
+		and	r5, r4, #15 << 16		@ get Rn
+		ldr	r0, [sp, r5, lsr #14]		@ load Rn value
+		tst	r4, #1 << 23			@ U bit
+		subne	r7, r0, r2
+		addeq	r7, r0, r2
+		b	Ldata_saver7
+
+Ldata_lateldrpreconst:
+		tst	r4, #1 << 21			@ check writeback bit
+		beq	Ldata_simple
+Ldata_lateldrpostconst:
+		movs	r2, r4, lsl #20			@ Get offset
+		beq	Ldata_simple
+		and	r5, r4, #15 << 16		@ Get Rn
+		ldr	r0, [sp, r5, lsr #14]
+		tst	r4, #1 << 23			@ U bit
+		subne	r7, r0, r2, lsr #20
+		addeq	r7, r0, r2, lsr #20
+		b	Ldata_saver7
+
+Ldata_lateldrprereg:
+		tst	r4, #1 << 21			@ check writeback bit
+		beq	Ldata_simple
+Ldata_lateldrpostreg:
+		and	r5, r4, #15
+		ldr	r2, [sp, r5, lsl #2]		@ Get Rm
+		mov	r3, r4, lsr #7
+		ands	r3, r3, #31
+		and	r6, r4, #0x70
+		orreq	r6, r6, #8
+		add	pc, pc, r6
+		mov	r0, r0
+
+		mov	r2, r2, lsl r3			@ 0: LSL #!0
+		b	1f
+		b	1f				@ 1: LSL #0
+		mov	r0, r0
+		b	1f				@ 2: MUL?
+		mov	r0, r0
+		b	1f				@ 3: MUL?
+		mov	r0, r0
+		mov	r2, r2, lsr r3			@ 4: LSR #!0
+		b	1f
+		mov	r2, r2, lsr #32			@ 5: LSR #32
+		b	1f
+		b	1f				@ 6: MUL?
+		mov	r0, r0
+		b	1f				@ 7: MUL?
+		mov	r0, r0
+		mov	r2, r2, asr r3			@ 8: ASR #!0
+		b	1f
+		mov	r2, r2, asr #32			@ 9: ASR #32
+		b	1f
+		b	1f				@ A: MUL?
+		mov	r0, r0
+		b	1f				@ B: MUL?
+		mov	r0, r0
+		mov	r2, r2, ror r3			@ C: ROR #!0
+		b	1f
+		mov	r2, r2, rrx			@ D: RRX
+		b	1f
+		mov	r0, r0				@ E: MUL?
+		mov	r0, r0
+		mov	r0, r0				@ F: MUL?
+
+
+1:		and	r5, r4, #15 << 16		@ Get Rn
+		ldr	r0, [sp, r5, lsr #14]
+		tst	r4, #1 << 23			@ U bit
+		subne	r7, r0, r2
+		addeq	r7, r0, r2
+		b	Ldata_saver7
+
+/*
+ * Function: oki_ml67500x_check_bugs (void)
+ *	   : oki_ml67500x_proc_init (void)
+ *	   : oki_ml67500x_proc_fin (void)
+ *
+ * Notes   : This processor does not require these
+ */
+ENTRY(cpu_oki_ml67500x_check_bugs)
+		mrs	ip, cpsr
+		bic	ip, ip, #F_BIT
+		msr	cpsr, ip
+		mov	pc, lr
+
+ENTRY(cpu_oki_ml67500x_proc_init)
+		mov	pc, lr
+
+ENTRY(cpu_oki_ml67500x_proc_fin)
+		stmfd	sp!, {lr}
+		ldmfd	sp!, {pc}
+
+/*
+ * Function: oki_ml67500x_proc_do_idle(void)
+ * Params  : r0 = unused
+ * Purpose : put the processer in proper idle mode
+ */
+ENTRY(cpu_oki_ml67500x_do_idle)
+		mov	pc, lr
+
+/*
+ * Function: oki_ml67500x_set_pgd(unsigned long pgd_phys)
+ * Params  : pgd_phys	Physical address of page table
+ * Purpose : Perform a task switch, saving the old process' state and restoring
+ *	     the new.
+ */
+
+ENTRY(cpu_oki_ml67500x_set_pgd)
+	mov	pc, r14
+
+/*
+ * Function: oki_ml67500x_set_pmd ()
+ *
+ * Params  : r0 = Address to set
+ *	   : r1 = value to set
+ *
+ * Purpose : Set a PMD and flush it out of any WB cache
+ */
+ENTRY(cpu_oki_ml67500x_set_pmd)
+		tst	r1, #3
+		orrne	r1, r1, #16			@ Updatable bit is
+		str	r1, [r0]			@ always set on OKI_ML67X
+		mov	pc, lr
+	
+
+/*
+ * Function: oki_ml67500x_set_pte(pte_t *ptep, pte_t pte)
+ * Params  : r0 = Address to set
+ *	   : r1 = value to set
+ * Purpose : Set a PTE and flush it out of any WB cache
+ */
+		.align	5
+ENTRY(cpu_oki_ml67500x_set_pte)
+		str	r1, [r0], #-1024		@ linux version
+
+		eor	r1, r1, #LPTE_PRESENT | LPTE_YOUNG | LPTE_WRITE | LPTE_DIRTY
+
+		bic	r2, r1, #0xff0
+		bic	r2, r2, #3
+		orr	r2, r2, #HPTE_TYPE_SMALL
+
+		tst	r1, #LPTE_USER | LPTE_EXEC	@ User or Exec?
+		orrne	r2, r2, #HPTE_AP_READ
+
+		tst	r1, #LPTE_WRITE | LPTE_DIRTY	@ Write and Dirty?
+		orreq	r2, r2, #HPTE_AP_WRITE
+
+		tst	r1, #LPTE_PRESENT | LPTE_YOUNG	@ Present and Young
+		movne	r2, #0
+
+		str	r2, [r0]			@ hardware version
+		mov	pc, lr
+
+/*
+ * Function: oki_ml67500x_reset
+ * Params  : r0 = address to jump to
+ * Notes   : This sets up everything for a reset
+ */
+ENTRY(cpu_oki_ml67500x_reset)
+		mov	ip, #0
+
+		mov	pc, r0
+
+	
+cpu_armvlsi_name:
+		.asciz	"OKI"
+cpu_oki_ml67500x_name:
+		.asciz	"ML67500X"
+		.align
+
+		.section ".text.init", #alloc, #execinstr
+
+__oki_ml67500x_setup:
+
+@setup memory regions
+@ 	
+		mov	pc, lr				@ __ret (head-armv.S)
+
+/*
+ * Purpose : Function pointers used to access above functions - all calls
+ *	     come through these
+ */
+		.type	oki_ml675001_processor_functions, #object
+ENTRY(oki_ml67500x_processor_functions)
+		.word	cpu_oki_ml67500x_data_abort
+		.word	cpu_oki_ml67500x_check_bugs
+		.word	cpu_oki_ml67500x_proc_init
+		.word	cpu_oki_ml67500x_proc_fin
+		.word	cpu_oki_ml67500x_reset
+		.word	cpu_oki_ml67500x_do_idle
+
+		/* cache */
+		.word	cpu_oki_ml67500x_cache_clean_invalidate_all
+		.word	cpu_oki_ml67500x_cache_clean_invalidate_range
+		.word	cpu_oki_ml67500x_flush_ram_page
+
+		/* dcache */
+		.word	cpu_oki_ml67500x_dcache_invalidate_range
+		.word	cpu_oki_ml67500x_dcache_clean_range
+		.word	cpu_oki_ml67500x_dcache_clean_page
+		.word	cpu_oki_ml67500x_dcache_clean_entry
+
+		/* icache */
+		.word	cpu_oki_ml67500x_icache_invalidate_range
+		.word	cpu_oki_ml67500x_icache_invalidate_page
+
+		/* tlb */
+		.word	cpu_oki_ml67500x_tlb_invalidate_all
+		.word	cpu_oki_ml67500x_tlb_invalidate_range
+		.word	cpu_oki_ml67500x_tlb_invalidate_page
+
+		/* pgtable */
+		.word	cpu_oki_ml67500x_set_pgd
+		.word	cpu_oki_ml67500x_set_pmd
+		.word	cpu_oki_ml67500x_set_pte
+		.size	oki_ml67500x_processor_functions, . - oki_ml67500x_processor_functions
+
+		.type	cpu_oki_ml67500x_info, #object
+cpu_oki_ml67500x_info:
+		.long	cpu_armvlsi_name
+		.long	cpu_oki_ml67500x_name
+		.size	cpu_oki_ml67500x_info, . - cpu_oki_ml67500x_info
+	
+		.type	cpu_arch_name, #object
+cpu_arch_name:	.asciz	"armv4"
+		.size	cpu_arch_name, . - cpu_arch_name
+
+		.type	cpu_elf_name, #object
+cpu_elf_name:	.asciz	"v4"
+		.size	cpu_elf_name, . - cpu_elf_name
+		.align
+
+/*
+ * See /include/asm-arm for a definition of this structure.
+ */
+	
+		.section ".proc.info", #alloc, #execinstr
+
+		.type	__oki_ml67500x_proc_info, #object
+__oki_ml67500x_proc_info:
+		.long	0x00675000				@ cpu_val
+		.long	0xfffffff0				@ cpu_mask
+		.long	0x00000c1e				@ section_mmu_flags
+		b	__oki_ml67500x_setup				@ cpu_flush
+		.long	cpu_arch_name				@ arch_name
+		.long	cpu_elf_name				@ elf_name
+		.long	HWCAP_SWP | HWCAP_HALF | HWCAP_26BIT	@ elf_hwcap
+		.long	cpu_oki_ml67500x_info				@ info
+		.long	oki_ml67500x_processor_functions
+		.size	__oki_ml67500x_proc_info, . - __oki_ml67500x_proc_info
diff -urN linux-2.4.29/drivers/char/Config.in linux-2.4.x/drivers/char/Config.in
--- linux-2.4.29/drivers/char/Config.in	2005-11-22 18:34:05.000000000 +0000
+++ linux-2.4.x/drivers/char/Config.in	2005-11-22 20:48:54.000000000 +0000
@@ -247,6 +247,19 @@
   fi
 fi
 
+if [ "$CONFIG_CPU_OKIM67400X" = "y" -o "$CONFIG_CPU_OKIM67500X" = "y" ]; then
+  bool 'OKI ML67XXXX SSP serial port support' CONFIG_SERIAL_ML67XXXX
+  if [ "$CONFIG_SERIAL_ML67XXXX" = "y" ]; then
+    bool 'Console on ML67XXXX SSP serial port' CONFIG_SERIAL_CONSOLE
+    bool 'Support Baud rates below 9600 baud' CONFIG_OKI_CCLK_HAVLED
+  fi
+fi
+
+if [ "$CONFIG_MACH_EB67XDIP" = "y" ]; then
+  bool 'Simtec EB675001DIP Quad Serial AppNote' CONFIG_EB67XDIP_QUADSER
+fi
+
+
 bool 'LED Manager support' CONFIG_LEDMAN
 bool 'SnapGear Watchdog Support' CONFIG_SNAPDOG
 bool 'Fast Timer Support' CONFIG_FAST_TIMER
diff -urN linux-2.4.29/drivers/char/Makefile linux-2.4.x/drivers/char/Makefile
--- linux-2.4.29/drivers/char/Makefile	2005-11-22 18:34:05.000000000 +0000
+++ linux-2.4.x/drivers/char/Makefile	2005-11-22 20:47:54.000000000 +0000
@@ -235,6 +235,9 @@
 #
 # uClinux drivers
 #
+obj-$(CONFIG_EB67XDIP_QUADSER) += oki_ml67x_quad.o
+obj-$(CONFIG_MACH_EB67XDIP) += oki_ml67x.o
+obj-$(CONFIG_SERIAL_ML67XXXX) += serial_ml67xxxx.o
 obj-$(CONFIG_68328_SERIAL) += 68328serial.o
 obj-$(CONFIG_SERIAL_DSC21) += serial_dsc21.o
 obj-$(CONFIG_SERIAL_C5471) += serial_c5471.o
diff -urN linux-2.4.29/drivers/char/oki_ml67x.c linux-2.4.x/drivers/char/oki_ml67x.c
--- linux-2.4.29/drivers/char/oki_ml67x.c	1970-01-01 01:00:00.000000000 +0100
+++ linux-2.4.x/drivers/char/oki_ml67x.c	2005-11-22 18:43:50.000000000 +0000
@@ -0,0 +1,52 @@
+#include <linux/module.h>
+#include <linux/config.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/tty.h>
+#include <linux/serial.h>
+#include <linux/types.h>
+
+#include <asm/io.h>
+#include <asm/serial.h>
+#include <asm/hardware.h>
+
+#include <asm/arch/irqs.h>
+
+#define cfg_port (0xb7b00000)
+#define cfg_irq (9)
+
+static int initialised = 0;
+
+int __init serial_oki_ml67x_init(void)
+{
+        struct serial_struct serial_req;
+
+	if (initialised)
+	    return 0;
+
+	initialised  = 1;
+
+        printk("registering serial (%08x,%d)\n", cfg_port, cfg_irq);
+
+        serial_req.flags = ASYNC_AUTOPROBE;
+        serial_req.baud_base = oki_cclk / 16;
+        serial_req.irq = cfg_irq;
+        serial_req.io_type = SERIAL_IO_MEM;
+        serial_req.iomem_base = ioremap(cfg_port, 0x10);
+        serial_req.iomem_reg_shift = 2;
+	serial_req.port = 0;
+
+	printk("serial_req.baud_base  = %d\n",   serial_req.baud_base);
+	printk("serial_req.iomem_base = %08x\n", serial_req.iomem_base);
+
+	printk("calling register_serial()\n");
+
+        return register_serial(&serial_req);
+}
+
+
+module_init(serial_oki_ml67x_init);
+
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("Ben Dooks, ben@simtec.co.uk");
+MODULE_DESCRIPTION("OKI ML67X Onboard Serial setup");
diff -urN linux-2.4.29/drivers/char/oki_ml67x_quad.c linux-2.4.x/drivers/char/oki_ml67x_quad.c
--- linux-2.4.29/drivers/char/oki_ml67x_quad.c	1970-01-01 01:00:00.000000000 +0100
+++ linux-2.4.x/drivers/char/oki_ml67x_quad.c	2005-11-22 20:47:54.000000000 +0000
@@ -0,0 +1,72 @@
+#include <linux/module.h>
+#include <linux/config.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/tty.h>
+#include <linux/serial.h>
+#include <linux/types.h>
+
+#include <asm/io.h>
+#include <asm/serial.h>
+#include <asm/hardware.h>
+
+#include <asm/arch/irqs.h>
+#include <asm/arch/gpio.h>
+
+#define SER_IRQ_MASK		(0xF8200000)
+#define SER_LED_STATE		(0xF8800000)
+#define SER_XCVR_CTRL		(0xF8C00000)
+
+#define cfg_base (0xfC000000)
+#define cfg_irq (IRQ_EXT3)
+
+static int initialised = 0;
+
+static __init int quad_init_one(unsigned long base, unsigned int irq)
+{
+        struct serial_struct serial_req;
+
+        /*printk("registering serial (%08x,%d)\n", base, irq);*/
+
+        serial_req.flags = ASYNC_AUTOPROBE;
+        serial_req.baud_base = oki_hclk / 128; /* /8 for CPLD and then /16 */
+        serial_req.irq = irq;
+        serial_req.io_type = SERIAL_IO_MEM;
+        serial_req.iomem_base = ioremap(base, 0x10);
+        serial_req.iomem_reg_shift = 0;
+	serial_req.port = 0;
+
+        return register_serial(&serial_req);
+}
+
+int __init serial_oki_ml67x_quad_init(void)
+{
+	int port;
+	int ret;
+
+	if (initialised)
+	    return 0;
+
+	initialised  = 1;
+
+	writeb(0x0f, SER_IRQ_MASK);
+	writeb(0x0f, SER_LED_STATE);
+
+	gpctl_modify(OKI_GPCTL_EXTI3, 0);
+
+	for (port = 0; port < 4; port++) {
+		ret = quad_init_one(cfg_base + (port << 21) , cfg_irq);
+		if (ret < 0)
+			printk(KERN_INFO "%s: port %d return %d\n",
+			       __FUNCTION__, port, ret);
+	}
+
+	return 0;
+}
+
+
+module_init(serial_oki_ml67x_quad_init);
+
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("Ben Dooks, ben@simtec.co.uk");
+MODULE_DESCRIPTION("OKI ML67X Onboard Serial setup");
diff -urN linux-2.4.29/drivers/char/serial.c linux-2.4.x/drivers/char/serial.c
--- linux-2.4.29/drivers/char/serial.c	2005-11-22 18:34:05.000000000 +0000
+++ linux-2.4.x/drivers/char/serial.c	2005-11-22 18:43:50.000000000 +0000
@@ -6391,6 +6391,14 @@
  */
 void __init serial_console_init(void)
 {
+#ifdef CONFIG_MACH_EB67XDIP
+	{
+		extern void serial_oki_ml67x_init(void);
+
+		serial_oki_ml67x_init();
+	}
+#endif
+
 	register_console(&sercons);
 }
 #endif
diff -urN linux-2.4.29/drivers/char/serial_ml67xxxx.c linux-2.4.x/drivers/char/serial_ml67xxxx.c
--- linux-2.4.29/drivers/char/serial_ml67xxxx.c	1970-01-01 01:00:00.000000000 +0100
+++ linux-2.4.x/drivers/char/serial_ml67xxxx.c	2005-11-22 18:43:50.000000000 +0000
@@ -0,0 +1,817 @@
+/*
+ * linux/drivers/char/serial_ml67xxxx.c
+ *
+ * Driver for the SIO serial port on the OKI ml67xxxx SOC.
+ *
+ * (c) 2005 Simtec Electronics
+ *
+ *
+ * Based on drivers/char/serial.c
+ */
+
+#include <linux/config.h>
+#include <linux/module.h>
+#include <linux/errno.h>
+#include <linux/signal.h>
+#include <linux/sched.h>
+#include <linux/interrupt.h>
+#include <linux/tty.h>
+#include <linux/tty_flip.h>
+#include <linux/serial.h>
+#include <linux/major.h>
+#include <linux/ptrace.h>
+#include <linux/ioport.h>
+#include <linux/mm.h>
+#include <linux/slab.h>
+#include <linux/init.h>
+#include <linux/console.h>
+
+#include <asm/io.h>
+#include <asm/irq.h>
+#include <asm/uaccess.h>
+#include <asm/arch/sio.h>
+#include <asm/arch/gpio.h>
+
+#include <asm/hardware.h>
+
+#if 1
+#define dbg(x...) printk(KERN_DEBUG ## x)
+#else
+#define dbg(x...)
+#endif
+
+#define dbg_tx(x...)
+#define dbg_wr(x...)
+
+
+#define BAUD_BASE		(oki_cclk)
+
+#define SERIAL_ML67XNAME	"ttySK"
+#define SERIAL_ML67XMAJOR	204
+#define SERIAL_ML67XMINOR	4
+
+#define SERIAL_ML67XAUXNAME	"cuask"
+#define SERIAL_ML67XAUXMAJOR	205
+#define SERIAL_ML67XAUXMINOR	4
+
+static struct tty_driver sio_driver, callout_driver;
+static struct tty_struct *sio_table[1];
+
+static struct termios sio_termios[1];
+static struct termios sio_termios_locked[1];
+
+static char wbuf[80], *putp = wbuf, *getp = wbuf, x_char;
+static struct tty_struct *sio_tty;
+
+static int sio_refcount;
+static int sio_use_count;
+static int sio_tx_inprogress;
+static int sio_tx_locked;
+static int sio_tx_stopped;
+
+static unsigned long sio_tx_last;
+
+static __inline__ unsigned int rd_reg(unsigned int reg)
+{
+	return __raw_readl(reg);
+}
+
+static __inline__ void wr_reg(unsigned int reg, unsigned int val)
+{
+	dbg_wr("sio: wr_reg(%08x, %02x)\n", reg, val);
+	__raw_writel(val, reg);
+}
+
+#define sio_xmit_ready() !sio_tx_inprogress
+#define sio_xmit_locked() sio_tx_locked
+
+static __inline__ void sio_xmit_lock(void)
+{
+	sio_tx_locked = 1;
+}
+
+static __inline__ void sio_xmit_unlock(void)
+{
+	sio_tx_locked = 0;
+}
+
+static void sio_xmit_check(void)
+{
+	unsigned int status;
+
+	/* must be called with irqs disabled */
+
+	status = rd_reg(OKI_SIOSTA);
+
+	dbg_tx("%s: status=%02x\n", __FUNCTION__, status);
+
+	if (status & OKI_SIOSTA_TRIRQ) {
+		sio_tx_inprogress = 0;
+		wr_reg(OKI_SIOSTA, OKI_SIOSTA_TRIRQ);
+	} else if (time_after(jiffies, sio_tx_last + HZ/10)) {
+		printk(KERN_ERR "sio: tx timeout\n");
+		sio_tx_inprogress = 0;
+	}
+}
+
+static __inline__ void sio_xmit_do(unsigned int ch)
+{
+	sio_tx_inprogress = 1;
+	sio_tx_last = jiffies;
+	wr_reg(OKI_SIOBUF, ch);
+}
+
+static __inline__ int sio_write_room(struct tty_struct *tty)
+{
+	return putp >= getp ? (sizeof(wbuf) - (long) putp + (long) getp) : ((long) getp - (long) putp - 1);
+}
+
+static __inline__  int sio_tx_empty(void) {
+	return (putp == getp);
+}
+
+#define ALL_ERRS (OKI_SIOSTA_OERR | OKI_SIOSTA_PERR | OKI_SIOSTA_FERR)
+
+static void sio_rx_int(void)
+{
+	unsigned int flag;
+	unsigned int ch;
+	unsigned int status;
+
+	if (!sio_tty) {
+		disable_irq(IRQ_SIO);
+		wr_reg(OKI_SIOSTA, OKI_SIOSTA_RVIRQ);
+		return;
+	}
+
+	do {
+		status = rd_reg(OKI_SIOSTA);
+		flag = TTY_NORMAL;
+ 
+		if ((status & OKI_SIOSTA_RVIRQ) == 0)
+			break;
+
+		ch = rd_reg(OKI_SIOBUF);
+		
+		wr_reg(OKI_SIOSTA, OKI_SIOSTA_RVIRQ | ALL_ERRS);
+
+		if ((status &  OKI_SIOSTA_OERR) && 1)
+			tty_insert_flip_char(sio_tty, 0, TTY_OVERRUN);
+
+		if (status & OKI_SIOSTA_PERR)
+			flag = TTY_PARITY;
+		else if (flag & OKI_SIOSTA_FERR )
+			flag = TTY_FRAME;
+
+		if (sio_tty->flip.count >= TTY_FLIPBUF_SIZE) {
+			printk("calling %p\n", sio_tty->flip.tqueue.routine);
+			sio_tty->flip.tqueue.routine((void *)sio_tty);
+		}
+
+		tty_insert_flip_char(sio_tty, ch, flag);
+	} while(1);
+
+	tty_flip_buffer_push(sio_tty);
+}
+
+static void sio_send_xchar(struct tty_struct *tty, char ch)
+{
+	// todo = fix
+	//x_char = ch;
+	//enable_irq(IRQ_CONTX);
+}
+
+static void sio_throttle(struct tty_struct *tty)
+{
+	if (I_IXOFF(tty))
+		sio_send_xchar(tty, STOP_CHAR(tty));
+}
+
+static void sio_unthrottle(struct tty_struct *tty)
+{
+	if (I_IXOFF(tty)) {
+		if (x_char)
+			x_char = 0;
+		else
+			sio_send_xchar(tty, START_CHAR(tty));
+	}
+}
+
+/* sio_tx_frombuff
+ *
+ * returns 0 if it finds there is nothing more to do, else 1 if there
+ * is the oportunity to do something
+*/
+
+static int sio_tx_frombuff(void)
+{
+	if (sio_tx_stopped)
+		return 0;
+
+	if (x_char) {
+		sio_xmit_do(x_char);
+		x_char = 0;
+		return 1;
+	}
+	
+	if (sio_tx_empty())
+		return 0;
+
+	sio_xmit_do(*getp);
+	
+	if (++getp >= wbuf + sizeof(wbuf))
+		getp = wbuf;
+
+	return 1;
+}
+
+static void sio_tx_int(void)
+{
+	unsigned long flags;
+
+	local_irq_save(flags);
+
+	while (1) {
+		sio_xmit_check();
+
+		if (sio_xmit_locked() || !sio_xmit_ready())
+			break;
+
+		if (!sio_tx_frombuff())
+			break;
+	}
+
+	local_irq_restore(flags);
+
+	if (sio_tty)
+		wake_up_interruptible(&sio_tty->write_wait);
+}
+
+static void sio_irq(int irq, void *dev, struct pt_regs *regs)
+{
+	while (1) {
+		unsigned int status = rd_reg(OKI_SIOSTA);
+
+		if (!(status & OKI_SIOSTA_ANYIRQ))
+			break;
+
+		if (status & OKI_SIOSTA_TRIRQ)
+			sio_tx_int();
+		
+		if (status & OKI_SIOSTA_RVIRQ)
+			sio_rx_int();
+	}
+}
+
+static inline int sio_xmit(int ch)
+{
+	unsigned long flags;
+
+	dbg_tx("%s: ch %02x (STA %02x)\n", __FUNCTION__, ch, rd_reg(OKI_SIOSTA));
+
+	local_irq_save(flags);
+
+	/* decided wether we can write this directly to the uart
+	 * or wether we are going to have to buffer it */
+
+	printk(KERN_DEBUG "%s: ready %d, locked %d, xchar %02x\n",
+	       __FUNCTION__, sio_xmit_ready(), sio_xmit_locked(), x_char);
+
+	if (sio_xmit_ready() && !sio_xmit_locked() && x_char == 0) {
+		sio_xmit_do(ch);
+		goto exit;
+	}
+
+	if (putp + 1 == getp ||
+	    (putp + 1 == wbuf + sizeof(wbuf) && getp == wbuf)) {
+		local_irq_restore(flags);
+		return 0;
+	}
+
+	*putp = ch;
+
+	if (++putp >= wbuf + sizeof(wbuf))
+		putp = wbuf;
+
+ exit:
+	local_irq_restore(flags);
+	return 1;
+}
+
+static int sio_write(struct tty_struct *tty, int from_user,
+		     const u_char * buf, int count)
+{
+	unsigned long flags;
+	int i;
+
+	dbg("%s(%p,%d,%p,%d)\n", __FUNCTION__,
+	       tty, from_user, buf, count);
+
+	if (from_user && verify_area(VERIFY_READ, buf, count))
+		return -EINVAL;
+
+	local_irq_save(flags);
+	sio_xmit_check();
+	local_irq_restore(flags);
+
+	for (i = 0; i < count; i++) {
+		char ch;
+		if (from_user)
+			__get_user(ch, buf + i);
+		else
+			ch = buf[i];
+	
+		if (!sio_xmit(ch))
+			break;
+	}
+
+	dbg("%s: returning %d\n", __FUNCTION__, i);
+	return i;
+}
+
+static void sio_put_char(struct tty_struct *tty, u_char ch)
+{
+	sio_xmit(ch);
+}
+
+static int sio_chars_in_buffer(struct tty_struct *tty)
+{
+	return sizeof(wbuf) - sio_write_room(tty);
+}
+
+static void sio_flush_buffer(struct tty_struct *tty)
+{
+	//disable_irq(IRQ_CONTX);
+	putp = getp = wbuf;
+	//if (x_char)
+	//enable_irq(IRQ_CONTX);
+}
+
+static inline void sio_set_cflag(int cflag)
+{
+	int h_lcr, baud, quot;
+
+	switch (cflag & CSIZE) {
+	case CS7:
+		h_lcr = OKI_SIOCON_LN7;
+		break;
+	default: /* CS8 */
+		h_lcr = 0x0;
+		break;
+
+	}
+	if (cflag & PARENB)
+		h_lcr |= OKI_SIOCON_EVN | OKI_SIOCON_PEN;
+
+	if (cflag & PARODD)
+		h_lcr |= OKI_SIOCON_PEN;
+
+	if (!(cflag & CSTOPB))
+		h_lcr |= OKI_SIOCON_TSTB;
+
+	switch (cflag & CBAUD) {
+	case B200:	baud = 200;		break;
+	case B300:	baud = 300;		break;
+	case B1200:	baud = 1200;		break;
+	case B1800:	baud = 1800;		break;
+	case B2400:	baud = 2400;		break;
+	case B4800:	baud = 4800;		break;
+	default:
+	case B9600:	baud = 9600;		break;
+	case B19200:	baud = 19200;		break;
+	case B38400:	baud = 38400;		break;
+	case B57600:	baud = 57600;		break;
+	case B115200:	baud = 115200;		break;
+	}
+
+	quot = 256 - (oki_cclk/(16*baud));
+
+	printk("quot = %d\n", quot);
+
+	wr_reg(OKI_SIOBCN, 0x00);
+	wr_reg(OKI_SIOCON, 0x00);
+
+	wr_reg(OKI_SIOBT,  quot);
+	wr_reg(OKI_SIOCON, h_lcr);
+
+	/* set for loopback test... */
+	if (0)
+		wr_reg(OKI_SIOTCN, OKI_SIOTCN_LBTST);
+	else
+		wr_reg(OKI_SIOTCN, 0x00);
+
+	wr_reg(OKI_SIOBCN, OKI_SIOBCN_BGRUN);
+
+	dbg("%s: STA=%02x. CON=%02x, BCN=%02x, TCN=%02x, OBT=%02x\n",
+	    __FUNCTION__,  rd_reg(OKI_SIOSTA), rd_reg(OKI_SIOCON),
+	    rd_reg(OKI_SIOBCN), rd_reg(OKI_SIOTCN), rd_reg(OKI_SIOBT));
+}
+
+static void sio_set_termios(struct tty_struct *tty, struct termios *old)
+{
+	if (old && tty->termios->c_cflag == old->c_cflag)
+		return;
+	sio_set_cflag(tty->termios->c_cflag);
+}
+
+
+static void sio_stop(struct tty_struct *tty)
+{
+	sio_tx_stopped = 1;
+}
+
+static void sio_start(struct tty_struct *tty)
+{
+	unsigned long flags;
+
+	local_irq_save(flags);
+	sio_tx_stopped = 0;
+	sio_tx_frombuff();
+	local_irq_restore(flags);
+}
+
+static void sio_wait_until_sent(struct tty_struct *tty, int timeout)
+{
+	int orig_jiffies = jiffies;
+
+	printk("%s:\n", __FUNCTION__);
+
+	while (1) {
+		current->state = TASK_INTERRUPTIBLE;
+		schedule_timeout(1);
+		if (signal_pending(current))
+			break;
+		if (timeout && time_after(jiffies, orig_jiffies + timeout))
+			break;
+
+		if (sio_tx_empty())
+			break;
+	}
+	current->state = TASK_RUNNING;
+}
+
+static int sio_open(struct tty_struct *tty, struct file *filp)
+{
+	int line;
+
+	dbg("%s:\n", __FUNCTION__);
+
+	MOD_INC_USE_COUNT;
+	line = MINOR(tty->device) - tty->driver.minor_start;
+	if (line) {
+		MOD_DEC_USE_COUNT;
+		return -ENODEV;
+	}
+
+	tty->driver_data = NULL;
+
+	tty->low_latency = 1;  // simple test
+
+	if (!sio_tty)
+		sio_tty = tty;
+
+	dbg("%s: STA=%02x. CON=%02x, BCN=%02x, TCN=%02x, BT=%02x\n",
+	    __FUNCTION__,  rd_reg(OKI_SIOSTA), rd_reg(OKI_SIOCON),
+	    rd_reg(OKI_SIOBCN), rd_reg(OKI_SIOTCN), rd_reg(OKI_SIOBT));
+
+	enable_irq(IRQ_SIO);
+	sio_use_count++;
+
+	return 0;
+}
+
+static void sio_close(struct tty_struct *tty, struct file *filp)
+{
+	dbg("%s:\n", __FUNCTION__);
+
+	dbg("%s: STA=%02x. CON=%02x, BCN=%02x, TCN=%02x, BT=%02x\n",
+	    __FUNCTION__,  rd_reg(OKI_SIOSTA), rd_reg(OKI_SIOCON),
+	    rd_reg(OKI_SIOBCN), rd_reg(OKI_SIOTCN), rd_reg(OKI_SIOBT));
+
+	if (!--sio_use_count) {
+		dbg("%s: closing down\n", __FUNCTION__);
+		sio_wait_until_sent(tty, 0);
+		disable_irq(IRQ_SIO);
+		sio_tty = NULL;
+	}
+
+	MOD_DEC_USE_COUNT;
+}
+
+static int sio_ioctl_getserialinfo(struct serial_struct *retinfo)
+{
+	struct serial_struct tmp;
+
+	memset(&tmp, 0, sizeof(tmp));
+
+	tmp.flags		= 0;
+	tmp.xmit_fifo_size	= 0;
+	tmp.baud_base		= oki_cclk / 16;
+	tmp.custom_divisor	= 0;
+	tmp.irq			= IRQ_SIO;
+
+	if (copy_to_user(retinfo, &tmp, sizeof(*retinfo)))
+		return -EFAULT;
+
+	return 0;
+}
+
+static int sio_ioctl_setserialinfo(struct serial_struct *retinfo)
+{
+
+	return -EINVAL;
+}
+
+static int sio_get_lsr(unsigned int *arg)
+{
+	unsigned int val = 0;
+
+	copy_to_user(arg, val, sizeof(val));
+
+	return 0;
+}
+
+
+static int sio_ioctl(struct tty_struct *tty, struct file *file,
+		     unsigned int cmd, unsigned long arg)
+{
+	if (cmd == TIOCGSERIAL)
+		return sio_ioctl_getserialinfo((struct serial_struct *)arg);
+
+	if (cmd == TIOCSSERIAL)
+		return sio_ioctl_setserialinfo((struct serial_struct *)arg);
+
+#if 0
+	if (cmd == TIOCSERGETLSR)
+		return sio_get_lsr((unsigned int *) arg);
+#endif
+
+	printk(KERN_ERR "unhandled ioctl(%08x)\n", cmd);
+
+	return n_tty_ioctl(tty, file, cmd, arg);
+	//return -EIO;
+}
+
+static struct tty_driver sio_driver = {
+	magic:		TTY_DRIVER_MAGIC,
+	driver_name:	"serial",
+	name:		SERIAL_ML67XNAME,
+	major:		SERIAL_ML67XMAJOR,
+	minor_start:	SERIAL_ML67XMINOR,
+	num:		1,
+	type:		TTY_DRIVER_TYPE_SERIAL,
+	subtype:	SERIAL_TYPE_NORMAL,
+	refcount:	&sio_refcount,
+	table:		sio_table,
+
+	open:		sio_open,
+	close:		sio_close,
+	write:		sio_write,
+	put_char:	sio_put_char,
+	write_room:	sio_write_room,
+	chars_in_buffer: sio_chars_in_buffer,
+	flush_buffer:	sio_flush_buffer,
+	throttle:	sio_throttle,
+	unthrottle:	sio_unthrottle,
+	send_xchar:	sio_send_xchar,
+	set_termios:	sio_set_termios,
+	ioctl:		sio_ioctl,
+	stop:		sio_stop,
+	start:		sio_start,
+	flags:		TTY_DRIVER_REAL_RAW | TTY_DRIVER_NO_DEVFS,
+	wait_until_sent: sio_wait_until_sent,
+};
+
+static struct tty_driver callout_driver;
+
+static __inline__ void sio_init_gpio(void)
+{
+	unsigned long flags;
+	unsigned long gpctl;
+
+	local_irq_save(flags);
+
+	gpctl = __raw_readw(OKI_GPCTL);
+	gpctl |= OKI_GPCTL_SIO;
+	__raw_writew(gpctl, OKI_GPCTL);
+
+	dbg("%s: new gpctl %04lx\n", __FUNCTION__, gpctl);
+	dbg("%s: CLKSTP=%08x\n", __FUNCTION__, __raw_readl(0xB8000004));
+	dbg("%s: BCKCTL=%04x\n", __FUNCTION__, __raw_readw(0xB7000004));
+
+	local_irq_restore(flags);
+}
+
+static int __init sio_init(void)
+{
+	int baud = B4800;
+
+	printk("Oki SIO driver, (c) 2005 Simtec Electronics\n");
+
+	sio_init_gpio();
+
+	sio_driver.termios        = sio_termios;
+	sio_driver.termios_locked = sio_termios_locked;
+	sio_driver.init_termios   = tty_std_termios;
+	sio_driver.init_termios.c_cflag = baud | CS8 | CREAD | HUPCL | CLOCAL;
+
+	/* initialise the port by setting the cflags */
+	sio_set_cflag(sio_driver.init_termios.c_cflag);
+
+	callout_driver         = sio_driver;
+	callout_driver.name    = SERIAL_ML67XAUXNAME;
+	callout_driver.major   = SERIAL_ML67XAUXMAJOR;
+	callout_driver.subtype = SERIAL_TYPE_CALLOUT;
+
+	if (request_irq(IRQ_SIO, sio_irq, 0, "sio", NULL)) {
+		printk(KERN_ERR "Couldn't get irq for sio");
+		return -ENXIO;
+	}
+
+	if (tty_register_driver(&sio_driver))
+		printk(KERN_ERR "Couldn't register ml67xxxx serial driver\n");
+
+	if (tty_register_driver(&callout_driver))
+		printk(KERN_ERR "Couldn't register ml67xxxx callout driver\n");
+
+	return 0;
+}
+
+static void __exit sio_fini(void)
+{
+	unsigned long flags;
+	int ret;
+
+	save_flags(flags);
+	cli();
+
+	ret = tty_unregister_driver(&callout_driver);
+	if (ret)
+		printk(KERN_ERR "Unable to unregister ml67xxxx callout driver "
+			"(%d)\n", ret);
+	ret = tty_unregister_driver(&sio_driver);
+	if (ret)
+		printk(KERN_ERR "Unable to unregister ml67xxxx driver (%d)\n",
+			ret);
+
+	free_irq(IRQ_SIO, NULL);
+	restore_flags(flags);
+}
+
+module_init(sio_init);
+module_exit(sio_fini);
+
+#ifdef CONFIG_SERIAL_ML67XCONSOLE
+/************** console driver *****************/
+
+static void sio_console_writech(unsigned int ch)
+{
+	unsigned long flags;
+
+	while (1) {
+		local_irq_save(flags);
+		sio_xmit_check();
+
+		if (sio_xmit_ready()) {
+			sio_xmit_do(ch);
+			local_irq_restore(flags);
+			return;
+		}
+
+		local_irq_restore(flags);
+	}
+}
+
+static void sio_console_write(struct console *co, const char *s, u_int count)
+{
+	unsigned long flags;
+	int i;
+
+	local_irq_save(flags);
+	sio_tx_lock();
+	local_irq_restore(flags);
+
+	for (i = 0; i < count; i++) {
+		sio_console_writech(s[i]);
+
+		if (s[i] == '\n')
+			sio_console_writech('\r');
+	}
+
+	/* unlock the tx queue, and check to see if there is anything
+	 * more to process 
+	 */
+
+	local_irq_save(flags);
+	sio_tx_unlock();	
+	sio_tx_frombuff();
+	local_irq_restore(flags);
+}
+
+static kdev_t sio_console_device(struct console *c)
+{
+	return MKDEV(SERIAL_ML67XMAJOR, SERIAL_ML67XMINOR);
+}
+
+static int __init sio_console_setup(struct console *co, char *options)
+{
+	int baud = 9600;
+	int bits = 8;
+	int parity = 'n';
+	int cflag = CREAD | HUPCL | CLOCAL;
+
+	if (options) {
+		char *s = options;
+		baud = simple_strtoul(options, NULL, 10);
+		while (*s >= '0' && *s <= '9')
+			s++;
+		if (*s)
+			parity = *s++;
+		if (*s)
+			bits = *s - '0';
+	}
+
+	/*
+	 *    Now construct a cflag setting.
+	 */
+	switch (baud) {
+	case 1200:
+		cflag |= B1200;
+		break;
+	case 2400:
+		cflag |= B2400;
+		break;
+	case 4800:
+		cflag |= B4800;
+		break;
+	case 9600:
+		cflag |= B9600;
+		break;
+	case 19200:
+		cflag |= B19200;
+		break;
+	case 38400:
+		cflag |= B38400;
+		break;
+	case 57600:
+		cflag |= B57600;
+		break;
+	case 115200:
+		cflag |= B115200;
+		break;
+	default:
+		cflag |= B9600;
+		break;
+	}
+	switch (bits) {
+	case 7:
+		cflag |= CS7;
+		break;
+	default:
+		cflag |= CS8;
+		break;
+	}
+	switch (parity) {
+	case 'o':
+	case 'O':
+		cflag |= PARODD;
+		break;
+	case 'e':
+	case 'E':
+		cflag |= PARENB;
+		break;
+	}
+
+	co->cflag = cflag;
+	sio_set_cflag(cflag);
+
+	sio_console_write(NULL, "\e[2J\e[Hboot ", 12);
+	if (options)
+		sio_console_write(NULL, options, strlen(options));
+	else
+		sio_console_write(NULL, "no options", 10);
+	sio_console_write(NULL, "\n", 1);
+
+	return 0;
+}
+
+
+static struct console sio_cons =
+{
+	name:		SERIAL_ML67XNAME,
+	write:		sio_console_write,
+	device:		sio_console_device,
+	setup:		sio_console_setup,
+	flags:		CON_PRINTBUFFER,
+	index:		-1,
+};
+
+void __init sio_console_init(void)
+{
+	register_console(&sio_cons);
+}
+
+#endif	/* CONFIG_SERIAL_ML67XCONSOLE */
+
+MODULE_LICENSE("GPL");
+EXPORT_NO_SYMBOLS;
diff -urN linux-2.4.29/drivers/i2c/Config.in linux-2.4.x/drivers/i2c/Config.in
--- linux-2.4.29/drivers/i2c/Config.in	2005-11-22 18:34:05.000000000 +0000
+++ linux-2.4.x/drivers/i2c/Config.in	2005-11-22 18:43:50.000000000 +0000
@@ -12,6 +12,11 @@
       dep_tristate '  Philips style parallel port adapter' CONFIG_I2C_PHILIPSPAR $CONFIG_I2C_ALGOBIT $CONFIG_PARPORT
       dep_tristate '  ELV adapter' CONFIG_I2C_ELV $CONFIG_I2C_ALGOBIT
       dep_tristate '  Motorola Coldfire GPIO adapter (EXPERIMENTAL)' CONFIG_I2C_MCF_GPIO $CONFIG_I2C_ALGOBIT $CONFIG_COLDFIRE $CONFIG_EXPERIMENTAL
+
+   if [ "$CONFIG_CPU_OKIM67500X" = "y" -o "$CONFIG_CPU_OKIM67400X" = "y" ]; then
+      dep_tristate 'Oki M67X00X I2C (GPIO)' CONFIG_I2C_OKI_M67X $CONFIG_I2C
+   fi
+
       if [ "$CONFIG_I2C_MCF_GPIO" != "n" ]; then
 	 if [ "$CONFIG_M5204" = "y" -o "$CONFIG_M5206" = "y" -o "$CONFIG_M5206e" = "y" ]; then
 	    comment 'M5204, M5206 and M5206e GPIO support'
@@ -415,4 +420,5 @@
    dep_tristate 'I2C device interface' CONFIG_I2C_CHARDEV $CONFIG_I2C
    dep_tristate 'I2C /proc interface (required for hardware sensors)' CONFIG_I2C_PROC $CONFIG_I2C $CONFIG_SYSCTL
 fi
+
 endmenu
diff -urN linux-2.4.29/drivers/i2c/Makefile linux-2.4.x/drivers/i2c/Makefile
--- linux-2.4.29/drivers/i2c/Makefile	2005-11-22 18:34:05.000000000 +0000
+++ linux-2.4.x/drivers/i2c/Makefile	2005-11-22 18:43:50.000000000 +0000
@@ -25,6 +25,7 @@
 obj-$(CONFIG_I2C_MCF_GPIO)	+= i2c-adap-mcf_gpio.o
 obj-$(CONFIG_I2C_NETARM_GPIO)	+= i2c-adap-netarm_gpio.o
 obj-$(CONFIG_I2C_MAX1617)	+= i2c-max1617.o
+obj-$(CONFIG_I2C_OKI_M67X)	+= i2c-oki-m67x-gpio.o
 
 # PCF adapters
 obj-$(CONFIG_I2C_ALGOPCF)	+= i2c-algo-pcf.o
diff -urN linux-2.4.29/drivers/i2c/i2c-oki-m67x-gpio.c linux-2.4.x/drivers/i2c/i2c-oki-m67x-gpio.c
--- linux-2.4.29/drivers/i2c/i2c-oki-m67x-gpio.c	1970-01-01 01:00:00.000000000 +0100
+++ linux-2.4.x/drivers/i2c/i2c-oki-m67x-gpio.c	2005-11-22 18:59:18.000000000 +0000
@@ -0,0 +1,113 @@
+/* */
+
+#include <linux/config.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/module.h>
+#include <linux/i2c.h>
+#include <linux/i2c-algo-bit.h>
+#include <linux/i2c-id.h>
+
+#include <asm/io.h>
+#include <asm/arch/hardware.h>
+#include <asm/arch/gpio.h>
+
+/* GPIO E3 - SDA
+ * GPIO E4 - SCL
+ *
+ * Note, we write the output only once, as we use the mode register
+ * to tri-state the output, to allow the bus to float high
+ *
+ * mode=0 => input, mode=1 => output
+*/
+
+#define PIN_SDA (1<<3)
+#define PIN_SCL (1<<4)
+
+static void oki_ml67x_i2c_inc_use(struct i2c_adapter *adap)
+{
+	MOD_INC_USE_COUNT;
+}
+
+static void oki_ml67x_i2c_dec_use(struct i2c_adapter *adap)
+{
+	MOD_DEC_USE_COUNT;
+}
+
+static void oki_ml67x_bit_setscl(void *data, int val)
+{
+	gpio_change(OKI_GPPME, val ? 0x0 : PIN_SCL, val ? PIN_SCL : 0x0);
+}
+
+static void oki_ml67x_bit_setsda(void *data, int val)
+{
+	gpio_change(OKI_GPPME, val ? 0x0 : PIN_SDA, val ? PIN_SDA : 0x0);
+}
+
+static int oki_ml67x_bit_getscl(void *data)
+{
+	if (__raw_readl(OKI_GPPME) & PIN_SCL)
+		gpio_change(OKI_GPPME, 0x00, PIN_SCL);
+
+	return (__raw_readl(OKI_GPPIE) & PIN_SCL) ? 1 : 0;
+}	
+
+static int oki_ml67x_bit_getsda(void *data)
+{
+	if (__raw_readl(OKI_GPPME) & PIN_SDA)
+		gpio_change(OKI_GPPME, 0x00, PIN_SDA);
+
+	return (__raw_readl(OKI_GPPIE) & PIN_SDA) ? 1 : 0;
+}	
+
+
+struct i2c_algo_bit_data oki_ml67x_bit_data = {
+	.setsda		= oki_ml67x_bit_setsda,
+	.setscl		= oki_ml67x_bit_setscl,
+	.getsda		= oki_ml67x_bit_getsda,
+	.getscl		= oki_ml67x_bit_getscl,
+	.udelay		= 5,
+	.mdelay		= 10,
+	.timeout	= 100
+};
+
+struct i2c_adapter oki_ml67x_i2c_adapter = {
+	.name 		= "OKI_ML67X I2C Adapter",
+	.id		= I2C_ALGO_EXP,
+	.algo_data	= &oki_ml67x_bit_data,
+	.inc_use	= oki_ml67x_i2c_inc_use,
+	.dec_use	= oki_ml67x_i2c_dec_use,
+};
+
+int __init oki_ml67x_i2c_init(void)
+{
+	int res;
+
+	gpctl_modify(0x00, OKI_GPCTL_I2C);
+
+	/* zero the output registers of both ports */
+	gpio_change(OKI_GPPOE, 0x0, PIN_SCL);
+	gpio_change(OKI_GPPOE, 0x0, PIN_SDA);
+
+	/* set both ports to input */
+	gpio_change(OKI_GPPME, 0x0, PIN_SCL);
+	gpio_change(OKI_GPPME, 0x0, PIN_SDA);
+
+	res = i2c_bit_add_bus(&oki_ml67x_i2c_adapter);
+	if (res != 0) {
+		printk(KERN_ERR "ERROR: Could not install OKI ML67X I2C\n");
+		return res;
+	}
+
+	printk(KERN_INFO "gpctl set to %04x\n", __raw_readl(OKI_GPCTL)); 
+
+	return 0;
+}
+
+void __exit oki_ml67x_i2c_exit(void)
+{
+	i2c_bit_del_bus(&oki_ml67x_i2c_adapter);
+}
+
+module_init(oki_ml67x_i2c_init);
+module_exit(oki_ml67x_i2c_exit);
diff -urN linux-2.4.29/drivers/mtd/chips/jedec_probe.c linux-2.4.x/drivers/mtd/chips/jedec_probe.c
--- linux-2.4.29/drivers/mtd/chips/jedec_probe.c	2005-11-22 18:34:06.000000000 +0000
+++ linux-2.4.x/drivers/mtd/chips/jedec_probe.c	2005-11-22 18:43:50.000000000 +0000
@@ -108,6 +108,7 @@
 #define SST29LE512	0x003d
 #define SST39LF800	0x2781
 #define SST39LF160	0x2782
+#define SST39VF320      0x235b
 #define SST39LF512	0x00D4
 #define SST39LF010	0x00D5
 #define SST39LF020	0x00D6
@@ -917,6 +918,19 @@
 		}
         }, {
 		mfr_id: MANUFACTURER_SST,
+	  dev_id: SST39VF320,
+	  name: "SST 39VF320",
+	  DevSize: SIZE_4MiB,
+	  CmdSet: P_ID_AMD_STD,
+	  NumEraseRegions: 4,
+	  /* Split into two regions to get around the 256-region restriction */
+	  regions: {ERASEINFO(0x01000,256),
+		    ERASEINFO(0x01000,256),
+		    ERASEINFO(0x01000,256),
+		    ERASEINFO(0x01000,256),
+	  }
+	}, {
+		mfr_id: MANUFACTURER_SST,
 		dev_id: SST39LF512,
 		name: "SST 39LF512",
 		DevSize: SIZE_64KiB,
diff -urN linux-2.4.29/drivers/mtd/maps/Config.in linux-2.4.x/drivers/mtd/maps/Config.in
--- linux-2.4.29/drivers/mtd/maps/Config.in	2005-11-22 18:34:06.000000000 +0000
+++ linux-2.4.x/drivers/mtd/maps/Config.in	2005-11-22 18:43:50.000000000 +0000
@@ -145,6 +145,7 @@
    dep_tristate '  JEDEC Flash device mapped on Ceiva/Polaroid PhotoMax Digital Picture Frame' CONFIG_MTD_CEIVA $CONFIG_MTD_JEDECPROBE  $CONFIG_ARCH_CEIVA
    dep_tristate '  JEDEC Flash device mapped on TI TMS320VC547X' CONFIG_MTD_VC547X $CONFIG_MTD_JEDECPROBE
    dep_tristate '  JEDEC Flash device mapped on Tiburon (Actiontec DPCM)' CONFIG_MTD_TIBURON $CONFIG_MTD_JEDECPROBE
+   dep_tristate '  JEDEC Flash device on Simtec EB67DIP' CONFIG_MTD_EB67DIP $CONFIG_MTD_JEDECPROBE $CONFIG_ARCH_EB67DIP
 fi
 
 if [ "$CONFIG_COBRA5272" = "y" ]; then
diff -urN linux-2.4.29/drivers/mtd/maps/Makefile linux-2.4.x/drivers/mtd/maps/Makefile
--- linux-2.4.29/drivers/mtd/maps/Makefile	2005-11-22 18:34:06.000000000 +0000
+++ linux-2.4.x/drivers/mtd/maps/Makefile	2005-11-22 18:43:50.000000000 +0000
@@ -89,6 +89,7 @@
 obj-$(CONFIG_MTD_CPU16B)        += mtdcpu16b.o
 obj-$(CONFIG_MTD_VC547X) += vc547x-flash.o
 obj-$(CONFIG_MTD_TIBURON)	+= tiburon.o
+obj-$(CONFIG_MTD_EB67DIP)       += eb67dip.o
 
 include $(TOPDIR)/Rules.make
 
diff -urN linux-2.4.29/drivers/mtd/maps/eb67dip.c linux-2.4.x/drivers/mtd/maps/eb67dip.c
--- linux-2.4.29/drivers/mtd/maps/eb67dip.c	1970-01-01 01:00:00.000000000 +0100
+++ linux-2.4.x/drivers/mtd/maps/eb67dip.c	2005-11-22 18:43:50.000000000 +0000
@@ -0,0 +1,142 @@
+/*
+ * MTD map driver for flash on the DC21285 (the StrongARM-110 companion chip)
+ *
+ * (C) 2000  Nicolas Pitre <nico@cam.org>
+ *
+ * This code is GPL
+ * 
+ * $Id: dc21285.c,v 1.9 2002/10/14 12:22:10 rmk Exp $
+ */
+#include <linux/config.h>
+#include <linux/module.h>
+#include <linux/types.h>
+#include <linux/kernel.h>
+
+#include <linux/mtd/mtd.h>
+#include <linux/mtd/map.h>
+#include <linux/mtd/partitions.h>
+
+#include <asm/io.h>
+
+
+static struct mtd_info *mymtd;
+
+__u8 eb67dip_read8(struct map_info *map, unsigned long ofs)
+{
+	return *(__u8*)(map->map_priv_1 + ofs);
+}
+
+__u16 eb67dip_read16(struct map_info *map, unsigned long ofs)
+{
+	return *(__u16*)(map->map_priv_1 + ofs);
+}
+
+__u32 eb67dip_read32(struct map_info *map, unsigned long ofs)
+{
+	return *(__u32*)(map->map_priv_1 + ofs);
+}
+
+void eb67dip_copy_from(struct map_info *map, void *to, unsigned long from, ssize_t len)
+{
+	memcpy(to, (void*)(map->map_priv_1 + from), len);
+}
+
+void eb67dip_write8(struct map_info *map, __u8 d, unsigned long adr)
+{
+	*(__u8*)(map->map_priv_1 + adr) = d;
+}
+
+void eb67dip_write16(struct map_info *map, __u16 d, unsigned long adr)
+{
+	*(__u16*)(map->map_priv_1 + adr) = d;
+}
+
+void eb67dip_write32(struct map_info *map, __u32 d, unsigned long adr)
+{
+	*(__u32*)(map->map_priv_1 + adr) = d;
+}
+
+void eb67dip_copy_to(struct map_info *map, unsigned long to, const void *from, ssize_t len)
+{
+	memcpy((void*)(map->map_priv_1 + from), to, len);
+}
+
+struct map_info eb67dip_map = {
+	name: "EB67DIP flash",
+	size: 16*1024*1024,
+	read8: eb67dip_read8,
+	read16: eb67dip_read16,
+	read32: eb67dip_read32,
+	copy_from: eb67dip_copy_from,
+	write8: eb67dip_write8,
+	write16: eb67dip_write16,
+	write32: eb67dip_write32,
+	copy_to: eb67dip_copy_to
+};
+
+
+/* Partition stuff */
+static struct mtd_partition *eb67dip_parts;
+		      
+extern int parse_redboot_partitions(struct mtd_info *, struct mtd_partition **);
+
+int __init init_eb67dip(void)
+{
+  printk (KERN_NOTICE "EB67DIP flash support \n");
+
+	eb67dip_map.buswidth = 2;
+
+	/* Let's map the flash area */
+	eb67dip_map.map_priv_1 = (unsigned long)ioremap_nocache(0xC8000000, 16*1024*1024);
+	if (!eb67dip_map.map_priv_1) {
+		printk("Failed to ioremap\n");
+		return -EIO;
+	}
+
+	mymtd = do_map_probe("jedec_probe", &eb67dip_map);
+	if (mymtd) {
+		int nrparts = 0;
+
+		mymtd->module = THIS_MODULE;
+			
+		/* partition fixup */
+
+#ifdef CONFIG_MTD_REDBOOT_PARTS
+		nrparts = parse_redboot_partitions(mymtd, &eb67dip_parts);
+#endif
+		if (nrparts > 0) {
+			add_mtd_partitions(mymtd, eb67dip_parts, nrparts);
+		} else if (nrparts == 0) {
+			printk(KERN_NOTICE "RedBoot partition table failed\n");
+			add_mtd_device(mymtd);
+		}
+
+		return 0;
+	}
+
+	iounmap((void *)eb67dip_map.map_priv_1);
+	return -ENXIO;
+}
+
+static void __exit cleanup_eb67dip(void)
+{
+	if (mymtd) {
+		del_mtd_device(mymtd);
+		map_destroy(mymtd);
+		mymtd = NULL;
+	}
+	if (eb67dip_map.map_priv_1) {
+		iounmap((void *)eb67dip_map.map_priv_1);
+		eb67dip_map.map_priv_1 = 0;
+	}
+	if(eb67dip_parts)
+		kfree(eb67dip_parts);
+}
+
+module_init(init_eb67dip);
+module_exit(cleanup_eb67dip);
+
+
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("Nicolas Pitre <nico@cam.org>, Ben Dooks <ben@simtec.co.uk>");
+MODULE_DESCRIPTION("MTD map driver for EB67DIP boards");
diff -urN linux-2.4.29/drivers/net/Config.in linux-2.4.x/drivers/net/Config.in
--- linux-2.4.29/drivers/net/Config.in	2005-11-22 18:34:06.000000000 +0000
+++ linux-2.4.x/drivers/net/Config.in	2005-11-22 18:43:50.000000000 +0000
@@ -321,6 +321,9 @@
 		MII-SW CONFIG_FEC_KS8995M_SW" MII-P5
 	fi
    fi
+   if [ "$CONFIG_MACH_EB67XDIP" = "y" ]; then
+      bool ' EB67DIP DM9000 support' CONFIG_ARM_EB67DIP_OKI
+   fi
    tristate '  CS89x0 support' CONFIG_CS89x0
    bool '  uCcs8900 support' CONFIG_UCCS8900
    if [ "$CONFIG_CS89x0" = "y" -o "$CONFIG_UCCS8900" = "y" ]; then
diff -urN linux-2.4.29/drivers/net/Makefile linux-2.4.x/drivers/net/Makefile
--- linux-2.4.29/drivers/net/Makefile	2005-11-22 18:34:06.000000000 +0000
+++ linux-2.4.x/drivers/net/Makefile	2005-11-22 18:43:50.000000000 +0000
@@ -178,6 +178,7 @@
 obj-$(CONFIG_ETHER_NS7520) += ns7520_eth.o
 obj-$(CONFIG_UCCS8900) += uCcs8900.o
 obj-$(CONFIG_SKYEYENE2k) += skyeyene2k.o
+obj-$(CONFIG_ARM_EB67DIP_OKI) += dm9000-oki.o
 
 obj-$(CONFIG_B44) += b44.o
 obj-$(CONFIG_FORCEDETH) += forcedeth.o
diff -urN linux-2.4.29/drivers/net/dm9000-oki.c linux-2.4.x/drivers/net/dm9000-oki.c
--- linux-2.4.29/drivers/net/dm9000-oki.c	1970-01-01 01:00:00.000000000 +0100
+++ linux-2.4.x/drivers/net/dm9000-oki.c	2005-11-22 18:43:50.000000000 +0000
@@ -0,0 +1,1182 @@
+/*
+  dm9000.c: Version 0.11 06/20/2001
+
+        A Davicom DM9000 ISA NIC fast Ethernet driver for Linux.
+	Copyright (C) 1997  Sten Wang
+	Copyright (C) 2003  Simtec Electronics <ben@simtec.co.uk>
+
+	This program is free software; you can redistribute it and/or
+	modify it under the terms of the GNU General Public License
+	as published by the Free Software Foundation; either version 2
+	of the License, or (at your option) any later version.
+
+	This program is distributed in the hope that it will be useful,
+	but WITHOUT ANY WARRANTY; without even the implied warranty of
+	MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+	GNU General Public License for more details.
+
+  Author: Sten Wang, 886-3-5798797-8517, E-mail: sten_wang@davicom.com.tw
+  Date:   10/28,1998
+
+  BAST / Linux 2.4 modifications by Ben Dooks, (C) 2003 Simtec Electronics
+
+  (C)Copyright 1997-1998 DAVICOM Semiconductor,Inc. All Rights Reserved.
+
+
+V0.11	06/20/2001	REG_0A bit3=1, default enable BP with DA match
+	06/22/2001 	Support DM9801 progrmming
+	 	 	E3: R25 = ((R24 + NF) & 0x00ff) | 0xf000
+		 	E4: R25 = ((R24 + NF) & 0x00ff) | 0xc200
+		     		R17 = (R17 & 0xfff0) | NF + 3
+		 	E5: R25 = ((R24 + NF - 3) & 0x00ff) | 0xc200
+		     		R17 = (R17 & 0xfff0) | NF
+*/
+#if defined(MODVERSIONS)
+#include <linux/modversions.h>
+#endif
+
+#include <linux/module.h>
+#include <linux/ioport.h>
+#include <linux/netdevice.h>
+#include <linux/etherdevice.h>
+#include <linux/skbuff.h>
+#include <linux/version.h>
+#include <linux/init.h>
+#include <linux/delay.h>
+
+#include <asm/dma.h>
+
+/* Board/System/Debug information/definition ---------------- */
+
+#define DM9000_ID	0x90000A46
+
+#define DM9000_REG00	0x00
+#define DM9000_REG05	0x30	/* SKIP_CRC/SKIP_LONG */
+#define DM9000_REG08	0x27
+#define DM9000_REG09	0x38
+#define DM9000_REG0A	0x08
+#define DM9000_REGFF	0x83	/* IMR */
+
+#define DM9000_PHY	0x40	/* PHY address 0x01 */
+#define DM9000_PKT_MAX	1536	/* Received packet max size */
+#define DM9000_PKT_RDY	0x01	/* Packet ready to receive */
+#define DM9000_MIN_IO	0x300
+#define DM9000_MAX_IO	0x370
+#define DM9000_INT_MII	0x00
+#define DM9000_EXT_MII	0x80
+
+#define DM9000_VID_L	0x28
+#define DM9000_VID_H	0x29
+#define DM9000_PID_L	0x2A
+#define DM9000_PID_H	0x2B
+
+#define DM9801_NOISE_FLOOR	0x08
+#define DM9802_NOISE_FLOOR	0x05
+
+#define DMFE_SUCC       0
+#define MAX_PACKET_SIZE 1514
+#define DMFE_MAX_MULTICAST 14
+
+#define DMFE_TIMER_WUT  jiffies+(HZ*2)	/* timer wakeup time : 2 second */
+#define DMFE_TX_TIMEOUT (HZ*2)	/* tx packet time-out time 1.5 s" */
+
+//#define DM9000_DEBUG
+
+#if defined(DM9000_DEBUG)
+#define DMFE_DBUG(dbug_now, msg, vaule) if (dmfe_debug || dbug_now) printk(KERN_ERR "dmfe: %s %x\n", msg, vaule)
+#else
+#define DMFE_DBUG(dbug_now, msg, vaule)
+#endif
+
+#if LINUX_VERSION_CODE < 0x20300
+#define DEVICE device
+#else
+#define DEVICE net_device
+#endif
+
+enum DM9000_PHY_mode {
+	DM9000_10MHD = 0, DM9000_100MHD = 1, DM9000_10MFD = 4,
+	DM9000_100MFD = 5, DM9000_AUTO = 8, DM9000_1M_HPNA =0x10 };
+
+enum DM9000_NIC_TYPE {
+	FASTETHER_NIC = 0, HOMERUN_NIC = 1, LONGRUN_NIC = 2 };
+
+#if 1
+#define  enet_statistics net_device_stats
+#endif
+
+/* Structure/enum declaration ------------------------------- */
+typedef struct board_info {
+	struct DEVICE *next_dev;	/* next device */
+
+	u32 runt_length_counter;	/* counter: RX length < 64byte */
+	u32 long_length_counter;	/* counter: RX length > 1514byte */
+	u32 reset_counter;		/* counter: RESET */
+	u32 reset_tx_timeout;		/* RESET caused by TX Timeout */
+	u32 reset_rx_status;		/* RESET caused by RX Statsus wrong */
+
+	void (*inblk)(unsigned long ioaddr, unsigned short *dp, u32 count);
+	void (*outblk)(unsigned long ioaddr, unsigned short *dp, u32 count);
+
+	u32 ioaddr;			/* Register I/O base address */
+	u32 io_data;			/* Data I/O address */
+	u16 irq;			/* IRQ */
+
+	u16 tx_pkt_cnt;
+	u16 queue_pkt_len;
+	u16 queue_start_addr;
+	u16 dbug_cnt;
+	u8 reg0, reg5, reg8, reg9, rega;	/* registers saved */
+	u8 op_mode;			/* PHY operation mode */
+	u8 io_mode;			/* 0:word, 2:byte */
+	u8 phy_addr;
+	u8 link_failed;			/* Ever link failed */
+	u8 device_wait_reset;		/* device state */
+	u8 nic_type;			/* NIC type */
+	struct timer_list timer;
+	struct enet_statistics stats;	/* statistic counter */
+	unsigned char srom[128];
+} board_info_t;
+
+/* Global variable declaration ----------------------------- */
+static int dmfe_debug = 1;
+static struct DEVICE * dmfe_root_dev = NULL;      /* First device */
+
+/* For module input parameter */
+static int debug = 0;
+static int mode = DM9000_AUTO;
+static int media_mode = DM9000_AUTO;
+static u8 reg5 = DM9000_REG05;
+static u8 reg8 = DM9000_REG08;
+static u8 reg9 = DM9000_REG09;
+static u8 rega = DM9000_REG0A;
+static u8 nfloor = 0;
+
+unsigned long CrcTable[256] = {
+   0x00000000L, 0x77073096L, 0xEE0E612CL, 0x990951BAL,
+   0x076DC419L, 0x706AF48FL, 0xE963A535L, 0x9E6495A3L,
+   0x0EDB8832L, 0x79DCB8A4L, 0xE0D5E91EL, 0x97D2D988L,
+   0x09B64C2BL, 0x7EB17CBDL, 0xE7B82D07L, 0x90BF1D91L,
+   0x1DB71064L, 0x6AB020F2L, 0xF3B97148L, 0x84BE41DEL,
+   0x1ADAD47DL, 0x6DDDE4EBL, 0xF4D4B551L, 0x83D385C7L,
+   0x136C9856L, 0x646BA8C0L, 0xFD62F97AL, 0x8A65C9ECL,
+   0x14015C4FL, 0x63066CD9L, 0xFA0F3D63L, 0x8D080DF5L,
+   0x3B6E20C8L, 0x4C69105EL, 0xD56041E4L, 0xA2677172L,
+   0x3C03E4D1L, 0x4B04D447L, 0xD20D85FDL, 0xA50AB56BL,
+   0x35B5A8FAL, 0x42B2986CL, 0xDBBBC9D6L, 0xACBCF940L,
+   0x32D86CE3L, 0x45DF5C75L, 0xDCD60DCFL, 0xABD13D59L,
+   0x26D930ACL, 0x51DE003AL, 0xC8D75180L, 0xBFD06116L,
+   0x21B4F4B5L, 0x56B3C423L, 0xCFBA9599L, 0xB8BDA50FL,
+   0x2802B89EL, 0x5F058808L, 0xC60CD9B2L, 0xB10BE924L,
+   0x2F6F7C87L, 0x58684C11L, 0xC1611DABL, 0xB6662D3DL,
+   0x76DC4190L, 0x01DB7106L, 0x98D220BCL, 0xEFD5102AL,
+   0x71B18589L, 0x06B6B51FL, 0x9FBFE4A5L, 0xE8B8D433L,
+   0x7807C9A2L, 0x0F00F934L, 0x9609A88EL, 0xE10E9818L,
+   0x7F6A0DBBL, 0x086D3D2DL, 0x91646C97L, 0xE6635C01L,
+   0x6B6B51F4L, 0x1C6C6162L, 0x856530D8L, 0xF262004EL,
+   0x6C0695EDL, 0x1B01A57BL, 0x8208F4C1L, 0xF50FC457L,
+   0x65B0D9C6L, 0x12B7E950L, 0x8BBEB8EAL, 0xFCB9887CL,
+   0x62DD1DDFL, 0x15DA2D49L, 0x8CD37CF3L, 0xFBD44C65L,
+   0x4DB26158L, 0x3AB551CEL, 0xA3BC0074L, 0xD4BB30E2L,
+   0x4ADFA541L, 0x3DD895D7L, 0xA4D1C46DL, 0xD3D6F4FBL,
+   0x4369E96AL, 0x346ED9FCL, 0xAD678846L, 0xDA60B8D0L,
+   0x44042D73L, 0x33031DE5L, 0xAA0A4C5FL, 0xDD0D7CC9L,
+   0x5005713CL, 0x270241AAL, 0xBE0B1010L, 0xC90C2086L,
+   0x5768B525L, 0x206F85B3L, 0xB966D409L, 0xCE61E49FL,
+   0x5EDEF90EL, 0x29D9C998L, 0xB0D09822L, 0xC7D7A8B4L,
+   0x59B33D17L, 0x2EB40D81L, 0xB7BD5C3BL, 0xC0BA6CADL,
+   0xEDB88320L, 0x9ABFB3B6L, 0x03B6E20CL, 0x74B1D29AL,
+   0xEAD54739L, 0x9DD277AFL, 0x04DB2615L, 0x73DC1683L,
+   0xE3630B12L, 0x94643B84L, 0x0D6D6A3EL, 0x7A6A5AA8L,
+   0xE40ECF0BL, 0x9309FF9DL, 0x0A00AE27L, 0x7D079EB1L,
+   0xF00F9344L, 0x8708A3D2L, 0x1E01F268L, 0x6906C2FEL,
+   0xF762575DL, 0x806567CBL, 0x196C3671L, 0x6E6B06E7L,
+   0xFED41B76L, 0x89D32BE0L, 0x10DA7A5AL, 0x67DD4ACCL,
+   0xF9B9DF6FL, 0x8EBEEFF9L, 0x17B7BE43L, 0x60B08ED5L,
+   0xD6D6A3E8L, 0xA1D1937EL, 0x38D8C2C4L, 0x4FDFF252L,
+   0xD1BB67F1L, 0xA6BC5767L, 0x3FB506DDL, 0x48B2364BL,
+   0xD80D2BDAL, 0xAF0A1B4CL, 0x36034AF6L, 0x41047A60L,
+   0xDF60EFC3L, 0xA867DF55L, 0x316E8EEFL, 0x4669BE79L,
+   0xCB61B38CL, 0xBC66831AL, 0x256FD2A0L, 0x5268E236L,
+   0xCC0C7795L, 0xBB0B4703L, 0x220216B9L, 0x5505262FL,
+   0xC5BA3BBEL, 0xB2BD0B28L, 0x2BB45A92L, 0x5CB36A04L,
+   0xC2D7FFA7L, 0xB5D0CF31L, 0x2CD99E8BL, 0x5BDEAE1DL,
+   0x9B64C2B0L, 0xEC63F226L, 0x756AA39CL, 0x026D930AL,
+   0x9C0906A9L, 0xEB0E363FL, 0x72076785L, 0x05005713L,
+   0x95BF4A82L, 0xE2B87A14L, 0x7BB12BAEL, 0x0CB61B38L,
+   0x92D28E9BL, 0xE5D5BE0DL, 0x7CDCEFB7L, 0x0BDBDF21L,
+   0x86D3D2D4L, 0xF1D4E242L, 0x68DDB3F8L, 0x1FDA836EL,
+   0x81BE16CDL, 0xF6B9265BL, 0x6FB077E1L, 0x18B74777L,
+   0x88085AE6L, 0xFF0F6A70L, 0x66063BCAL, 0x11010B5CL,
+   0x8F659EFFL, 0xF862AE69L, 0x616BFFD3L, 0x166CCF45L,
+   0xA00AE278L, 0xD70DD2EEL, 0x4E048354L, 0x3903B3C2L,
+   0xA7672661L, 0xD06016F7L, 0x4969474DL, 0x3E6E77DBL,
+   0xAED16A4AL, 0xD9D65ADCL, 0x40DF0B66L, 0x37D83BF0L,
+   0xA9BCAE53L, 0xDEBB9EC5L, 0x47B2CF7FL, 0x30B5FFE9L,
+   0xBDBDF21CL, 0xCABAC28AL, 0x53B39330L, 0x24B4A3A6L,
+   0xBAD03605L, 0xCDD70693L, 0x54DE5729L, 0x23D967BFL,
+   0xB3667A2EL, 0xC4614AB8L, 0x5D681B02L, 0x2A6F2B94L,
+   0xB40BBE37L, 0xC30C8EA1L, 0x5A05DF1BL, 0x2D02EF8DL
+};
+
+/* function declaration ------------------------------------- */
+int dmfe_probe(struct DEVICE *);
+static int dmfe_open(struct DEVICE *);
+static int dmfe_start_xmit(struct sk_buff *, struct DEVICE *);
+static int dmfe_stop(struct DEVICE *);
+static struct enet_statistics * dmfe_get_stats(struct DEVICE *);
+static int dmfe_do_ioctl(struct DEVICE *, struct ifreq *, int);
+static void dmfe_interrupt(int , void *, struct pt_regs *);
+static void dmfe_timer(unsigned long);
+static void dmfe_init_dm9000(struct DEVICE *);
+static unsigned long cal_CRC(unsigned char *, unsigned int, u8);
+static u8 ior(board_info_t *, int);
+static void iow(board_info_t *, int, u8);
+static u16 phy_read(board_info_t *, int);
+static void phy_write(board_info_t *, int, u16);
+static u16 read_srom_word(board_info_t *, int);
+static void dmfe_packet_receive(struct DEVICE *, board_info_t *);
+static void dm9000_hash_table(struct DEVICE *);
+
+/* DM9000 network baord routine ---------------------------- */
+
+#include <asm/arch/irqs.h>
+#include <asm/io.h>
+
+/*
+   Read a byte from I/O port
+*/
+static inline u8 ior(board_info_t *db, int reg)
+{
+	__raw_writeb(reg, db->ioaddr);
+	return __raw_readb(db->io_data);
+}
+
+/*
+   Write a byte to I/O port
+*/
+static inline void iow(board_info_t *db, int reg, u8 value)
+{
+	__raw_writeb(reg, db->ioaddr);
+	__raw_writeb(value, db->io_data);
+}
+
+/* get/put blocks to chip */
+
+/* these routines seem to allow an ftp-get at about 1.95MB/sec at 226MHz */
+
+static void dm_bast_outblk(unsigned long addr, unsigned short *dp, u32 len)
+{
+  __raw_writesw(addr, dp, (len+1)/2);
+}
+
+static void dm_bast_inblk(unsigned long addr, unsigned short *dp, u32 len)
+{
+  __raw_readsw(addr, dp, (len+1)/2);
+}
+
+#if 0
+/* don't use the fast IO routines atm */
+
+extern void __raw_m8_readsl(void *, void *, int);
+extern void __raw_m8_writesl(void *, void *, int);
+
+#define is_aligned(ptr) ((((unsigned long)(ptr)) & 3) == 0)
+
+static void dm_bast_outblk_f(unsigned long addr, unsigned short *dp, u32 len)
+{
+	if (len & 1)   /* round up packet length to half-word*/
+		len++;
+
+	if (!is_aligned(dp)) {
+		__raw_writew(*dp, addr);
+		dp++;
+		len -= 2;
+	}
+
+	__raw_m8_writesl((void *)addr, dp, len >> 2);
+
+	/* if we have 2 bytes left, then move them */
+	if ((len & 3) > 1) {
+		dp += (len / 2);
+		__raw_writew(dp[-1], addr);
+	}
+}
+
+static void dm_bast_inblk_f(unsigned long addr, unsigned short *dp, u32 len)
+{
+	if (len & 1)
+		len++;
+
+	if (!is_aligned(dp)) {
+		*dp++ = __raw_readw(addr);
+		len -= 2;
+	}
+
+	__raw_m8_readsl((void *)addr, dp, len >> 2);
+
+	if (len & 2) {
+		dp += len/2;
+		dp[-1] = __raw_readw(addr);
+	}
+}
+#else
+#define dm_bast_inblk_f dm_bast_inblk
+#define dm_bast_outblk_f dm_bast_outblk
+#endif
+
+
+#define OKI_DM9000_BASE (0xF0000000 + (7<<21))
+#define IRQ_DM9000 (22)
+
+/*
+  Search DM9000 board, allocate space and register it
+*/
+int dmfe_bast_probe(struct DEVICE *dev)
+{
+	struct board_info *db;    /* Point a board information structure */
+	u32 id_val;
+	u32 addr, data;
+	u16 i, dm9000_count = 0;
+	u8  irqline;
+
+	printk("EB67DIP DM9000 Driver, (c) 2003 Simtec Electronics\n");
+
+	DMFE_DBUG(0, "dmfe_probe()",0);
+
+	/* Search All DM9000 NIC */
+	do {
+		addr = OKI_DM9000_BASE;
+		data = OKI_DM9000_BASE + (1<<18);
+
+		__raw_writeb(DM9000_VID_L, addr);
+		id_val = __raw_readb(data);
+		__raw_writeb(DM9000_VID_H, addr);
+		id_val |= __raw_readb(data) << 8;
+		__raw_writeb(DM9000_PID_L, addr);
+		id_val |= __raw_readb(data) << 16;
+		__raw_writeb(DM9000_PID_H, addr);
+		id_val |= __raw_readb(data) << 24;
+
+		printk("DM9000: id=%08x\n", id_val);
+
+		if (id_val == DM9000_ID) {
+			dm9000_count++;
+
+			DMFE_DBUG(0, "dmfe_probe(): found",0);
+
+			/* Init network device */
+			dev = init_etherdev(dev, 0);
+
+			DMFE_DBUG(0, "dmfe_probe(): done init_etherdev",0);
+
+			/* Allocated board information structure */
+			irqline = IRQ_DM9000;
+
+			DMFE_DBUG(0, "dmfe_probe: allopcating bloc...", 0);
+
+			db = (void *)(kmalloc(sizeof(*db), GFP_KERNEL));
+			DMFE_DBUG(0, "dmfe_probe(): db: ", db);
+
+			memset(db, 0, sizeof(*db));
+			dev->priv = db;	/* link device and board info */
+			db->next_dev = dmfe_root_dev;
+			dmfe_root_dev = dev;
+			db->ioaddr = addr;
+			db->io_data = data;
+
+			db->outblk = dm_bast_outblk_f;
+			db->inblk = dm_bast_inblk_f;
+
+			/* driver system function */
+			dev->base_addr = addr;
+			dev->irq = irqline;
+			dev->open = &dmfe_open;
+			dev->hard_start_xmit = &dmfe_start_xmit;
+			dev->stop = &dmfe_stop;
+			dev->get_stats = &dmfe_get_stats;
+			dev->set_multicast_list = &dm9000_hash_table;
+			dev->do_ioctl = &dmfe_do_ioctl;
+
+			DMFE_DBUG(0, "dmfe_probe(): reading SROM",0);
+
+			/* Read SROM content */
+			for (i=0; i<64; i++)
+				((u16 *)db->srom)[i] = read_srom_word(db, i);
+
+#if 0
+			/* Set Node Address */
+			for (i=0; i<6; i++)
+				dev->dev_addr[i] = db->srom[i];
+#else
+			for (i = 0; i < 6; i++) {
+			  __raw_writeb(i+0x10, addr);
+			  dev->dev_addr[i] = __raw_readb(data);
+			}
+#endif
+			DMFE_DBUG(0, "dmfe_probe(): requesting resources\n",0);
+
+			/* Request IO from system */
+			request_region(addr, 0x40, dev->name);
+			request_region(data, 0x40, dev->name);
+
+			/* Announce found device */
+			printk("%s: bast-dm9000 found at %#lx, IRQ %d, ",
+				dev->name, addr, dev->irq);
+
+			for(i = 0; i < 6; i++) {
+				printk("%2.2X%s", dev->dev_addr[i], i == 5 ? ".\n": ":");
+			}
+
+			dev = 0;             /* NULL device */
+
+		} else {
+			printk("dm9000: %08x: read ID %08x\n", addr, id_val);
+		}
+	} while(0);
+
+	return dm9000_count ? 0:-ENODEV;
+}
+
+/*
+  Open the interface.
+  The interface is opened whenever "ifconfig" actives it.
+*/
+static int dmfe_open(struct DEVICE *dev)
+{
+	board_info_t * db = (board_info_t *)dev->priv;
+
+	DMFE_DBUG(0, "dmfe_open", 0);
+
+	if (request_irq(dev->irq, &dmfe_interrupt, SA_SHIRQ, dev->name, dev))
+		return -EAGAIN;
+
+	/* Initilize DM910X board */
+	dmfe_init_dm9000(dev);
+
+	/* Init driver variable */
+	db->dbug_cnt = 0;
+	db->runt_length_counter = 0;
+	db->long_length_counter = 0;
+	db->reset_counter = 0;
+
+	/* Active System Interface */
+#if 0
+	dev->tbusy = 0;	/* Can transmit packet */
+	dev->start = 1;	/* interface ready */
+#endif
+	MOD_INC_USE_COUNT;
+
+	/* set and active a timer process */
+	init_timer(&db->timer);
+	db->timer.expires = DMFE_TIMER_WUT * 2;
+	db->timer.data = (unsigned long)dev;
+	db->timer.function = &dmfe_timer;
+	add_timer(&db->timer);
+
+	return 0;
+}
+
+/* Set PHY operationg mode
+*/
+static void set_PHY_mode(board_info_t *db)
+{
+	u16 phy_reg4 = 0x01e1, phy_reg0=0x1000;
+
+	if ( !(db->op_mode & DM9000_AUTO) ) {
+		switch(db->op_mode) {
+		case DM9000_10MHD: phy_reg4 = 0x21; phy_reg0 = 0x0000; break;
+		case DM9000_10MFD: phy_reg4 = 0x41; phy_reg0 = 0x0100; break;
+		case DM9000_100MHD: phy_reg4 = 0x81; phy_reg0 = 0x2000; break;
+		case DM9000_100MFD: phy_reg4 = 0x101; phy_reg0 = 0x2100; break;
+		}
+		phy_write(db, 4, phy_reg4);	/* Set PHY media mode */
+		phy_write(db, 0, phy_reg0);	/*  Tmp */
+	}
+
+	iow(db, 0x1e, 0x01);		/* Let GPIO0 output */
+	iow(db, 0x1f, 0x00);		/* Enable PHY */
+}
+
+/*
+	Init HomeRun DM9801
+*/
+static void program_dm9801(board_info_t *db, u16 HPNA_rev)
+{
+	__u16 reg16, reg17, reg24, reg25;
+
+	if ( !nfloor ) nfloor = DM9801_NOISE_FLOOR;
+
+	reg16 = phy_read(db, 16);
+	reg17 = phy_read(db, 17);
+	reg24 = phy_read(db, 24);
+	reg25 = phy_read(db, 25);
+
+	switch(HPNA_rev) {
+	case 0xb900: /* DM9801 E3 */
+		reg16 |= 0x1000;
+		reg25 = ( (reg24 + nfloor) & 0x00ff) | 0xf000;
+		break;
+	case 0xb901: /* DM9801 E4 */
+		reg25 = ( (reg24 + nfloor) & 0x00ff) | 0xc200;
+		reg17 = (reg17 & 0xfff0) + nfloor + 3;
+		break;
+	case 0xb902: /* DM9801 E5 */
+	case 0xb903: /* DM9801 E6 */
+	default:
+		reg16 |= 0x1000;
+		reg25 = ( (reg24 + nfloor - 3) & 0x00ff) | 0xc200;
+		reg17 = (reg17 & 0xfff0) + nfloor;
+		break;
+	}
+
+	phy_write(db, 16, reg16);
+	phy_write(db, 17, reg17);
+	phy_write(db, 25, reg25);
+}
+
+/*
+	Init LongRun DM9802
+*/
+static void program_dm9802(board_info_t *db)
+{
+	__u16 reg25;
+
+	if ( !nfloor ) nfloor = DM9802_NOISE_FLOOR;
+
+	reg25 = phy_read(db, 25);
+	reg25 = (reg25 & 0xff00) + nfloor;
+	phy_write(db, 25, reg25);
+}
+
+/* Identify NIC type
+*/
+static void identify_nic(board_info_t *db)
+{
+	u16 phy_reg3;
+
+	iow(db, 0, DM9000_EXT_MII);
+	phy_reg3 = phy_read(db, 3);
+	switch(phy_reg3 & 0xfff0) {
+	case 0xb900:
+		if (phy_read(db, 31) == 0x4404) {
+			db->nic_type =  HOMERUN_NIC;
+			program_dm9801(db, phy_reg3);
+		} else {
+			db->nic_type = LONGRUN_NIC;
+			program_dm9802(db);
+		}
+		break;
+	default: db->nic_type = FASTETHER_NIC; break;
+	}
+	iow(db, 0, DM9000_INT_MII);
+}
+
+/* Initilize dm9000 board
+*/
+static void dmfe_init_dm9000(struct DEVICE *dev)
+{
+	board_info_t *db = (board_info_t *)dev->priv;
+
+	DMFE_DBUG(0, "dmfe_init_dm9000()", 0);
+
+	/* RESET device */
+	iow(db, 0, 1);
+	udelay(100);	/* delay 100us */
+
+	/* I/O mode */
+	db->io_mode = ior(db, 0xfe) >> 6; 	/* ISR bit7:6 keeps I/O mode */
+
+	/* NIC Type: FASTETHER, HOMERUN, LONGRUN */
+	identify_nic(db);
+
+	/* Set PHY */
+	db->op_mode = media_mode;
+	set_PHY_mode(db);
+
+	/* Init needed register value */
+	db->reg0 = DM9000_REG00;
+	if ( (db->nic_type != FASTETHER_NIC) && (db->op_mode & DM9000_1M_HPNA) )
+		db->reg0 |= DM9000_EXT_MII;
+
+	/* User passed argument */
+	db->reg5 = reg5;
+	db->reg8 = reg8;
+	db->reg9 = reg9;
+	db->rega = rega;
+
+	/* Program operating register */
+	iow(db, 0x00, db->reg0);
+	iow(db, 0x02, 0);	/* TX Polling clear */
+	iow(db, 0x08, 0x3f);	/* Less 3Kb, 200us */
+	iow(db, 0x09, db->reg9);/* Flow Control : High/Low Water */
+	iow(db, 0x0a, db->rega);/* Flow Control */
+	iow(db, 0x2f, 0);	/* Special Mode */
+	iow(db, 0x01, 0x2c);	/* clear TX status */
+	iow(db, 0xfe, 0x0f); 	/* Clear interrupt status */
+
+	/* Set address filter table */
+	dm9000_hash_table(dev);
+
+	/* Activate DM9000 */
+	iow(db, 0x05, db->reg5 | 1);	/* RX enable */
+	iow(db, 0xff, DM9000_REGFF); 	/* Enable TX/RX interrupt mask */
+
+	/* Init Driver variable */
+	db->link_failed = 1;
+	db->tx_pkt_cnt = 0;
+	db->queue_pkt_len = 0;
+	dev->trans_start = 0;
+}
+
+/*
+  Hardware start transmission.
+  Send a packet to media from the upper layer.
+*/
+static int dmfe_start_xmit(struct sk_buff *skb, struct DEVICE *dev)
+{
+	board_info_t *db = (board_info_t *)dev->priv;
+	int i;
+
+	DMFE_DBUG(0, "dmfe_start_xmit", 0);
+
+	/* Resource flag check */
+#if 0
+	if ( test_and_set_bit(0, (void *)&dev->tbusy) || (db->tx_pkt_cnt > 1) )
+		return 1;
+#else
+	if (db->tx_pkt_cnt > 1)
+	        return 1;
+#endif
+
+	/* Disable all interrupt */
+	iow(db, 0xff, 0x80);
+
+	/* Move data to DM9000 TX RAM */
+	__raw_writeb(0xf8, db->ioaddr);
+
+	(db->outblk)(db->io_data, (unsigned short *)skb->data, skb->len);
+
+	/* TX control: First packet immediately send, second packet queue */
+	if (db->tx_pkt_cnt == 0) {
+		/* First Packet */
+		db->tx_pkt_cnt++;
+
+		/* Set TX length to DM9000 */
+		iow(db, 0xfc, skb->len & 0xff);
+		iow(db, 0xfd, (skb->len >> 8) & 0xff);
+
+		/* Issue TX polling command */
+		iow(db, 0x2, 0x1);	/* Cleared after TX complete */
+
+		dev->trans_start = jiffies;	/* saved the time stamp */
+	} else {
+		/* Second packet */
+		db->tx_pkt_cnt++;
+		db->queue_pkt_len = skb->len;
+	}
+
+	/* free this SKB */
+	dev_kfree_skb(skb);
+
+#if 0
+	/* Re-enable resource check */
+	if (db->tx_pkt_cnt == 1)
+		clear_bit(0, (void*)&dev->tbusy);
+#else
+	/* we don't need to do anything with this for 2.4 */
+#endif
+
+	/* Re-enable interrupt mask */
+	iow(db, 0xff, 0x83);
+
+	return 0;
+}
+
+/*
+  Stop the interface.
+  The interface is stopped when it is brought.
+*/
+static int dmfe_stop(struct DEVICE *dev)
+{
+	board_info_t *db = (board_info_t *)dev->priv;
+
+	DMFE_DBUG(0, "dmfe_stop", 0);
+
+	/* deleted timer */
+	del_timer(&db->timer);
+
+	/* disable system */
+#if 0
+	dev->start = 0;	/* interface disable */
+	dev->tbusy = 1;	/* can't transmit */
+#else
+	netif_stop_queue(dev);
+#endif
+
+	/* free interrupt */
+	free_irq(dev->irq, dev);
+
+	/* RESET devie */
+	phy_write(db, 0x00, 0x8000);	/* PHY RESET */
+	iow(db, 0x1f, 0x01);	/* Power-Down PHY */
+	iow(db, 0xff, 0x80);	/* Disable all interrupt */
+	iow(db, 0x05, 0x00);	/* Disable RX */
+
+	MOD_DEC_USE_COUNT;
+
+	/* Dump Statistic counter */
+#if 1
+	printk("\nRX FIFO OVERFLOW %lx\n", db->stats.rx_fifo_errors++);
+	printk("RX CRC %lx\n", db->stats.rx_crc_errors++);
+	printk("RX LEN Err %lx\n", db->stats.rx_length_errors++);
+	printk("RX LEN<64byte %x\n", db->runt_length_counter);
+	printk("RX LEN>1514byte %x\n", db->long_length_counter);
+	printk("RESET %x\n", db->reset_counter);
+	printk("RESET: TX Timeout %x\n", db->reset_tx_timeout);
+	printk("RESET: RX Status Wrong %x\n", db->reset_rx_status);
+#endif
+
+	return 0;
+}
+
+/*
+  DM9102 insterrupt handler
+  receive the packet to upper layer, free the transmitted packet
+*/
+static void dmfe_interrupt(int irq, void *dev_id, struct pt_regs *regs)
+{
+	struct DEVICE *dev = dev_id;
+
+	board_info_t *db;
+	int int_status, tx_status;
+	u8 reg_save;
+
+	DMFE_DBUG(0, "dmfe_interrupt()", 0);
+
+	if (!dev) {
+		DMFE_DBUG(1, "dmfe_interrupt() without DEVICE arg", 0);
+		return;
+	}
+
+#if 0
+	if (dev->interrupt) {
+		DMFE_DBUG(1, "dmfe_interrupt() re-entry ", 0);
+		return;
+	}
+
+	/* A real interrupt coming */
+	dev->interrupt=1;              /* Lock interrupt */
+#endif
+
+	db = (board_info_t *)dev->priv;
+
+	/* Save previous register address */
+	reg_save = __raw_readb(db->ioaddr);
+
+	/* Disable all interrupt */
+	iow(db, 0xff, 0x80);
+
+	/* Got DM9000 interrupt status */
+	int_status = ior(db, 0xfe);		/* Got ISR */
+	iow(db, 0xfe, int_status);		/* Clear ISR status */
+	//printk("I%x ", int_status);
+
+	/* Received the coming packet */
+	if (int_status & 1)
+		dmfe_packet_receive(dev, db);
+
+	/* Trnasmit Interrupt check */
+	if (int_status & 2) {
+		tx_status = ior(db, 0x01);	/* Got TX status */
+		if (tx_status & 0xc) {
+			/* One packet sent complete */
+			db->tx_pkt_cnt--;
+			dev->trans_start = 0;
+			db->stats.tx_packets++;
+
+			/* Queue packet check & send */
+			if (db->tx_pkt_cnt > 0) {
+				iow(db, 0xfc, db->queue_pkt_len & 0xff);
+				iow(db, 0xfd, (db->queue_pkt_len >> 8) & 0xff);
+				iow(db, 0x2, 0x1);
+				dev->trans_start = jiffies;
+			}
+
+#if 0
+			dev->tbusy = 0;	/* Active upper layer, send again */
+			mark_bh(NET_BH);
+#else
+			netif_wake_queue(dev);
+#endif
+
+		}
+	}
+
+	/* Re-enable interrupt mask */
+	iow(db, 0xff, 0x83);
+
+	/* Restore previous register address */
+	__raw_writeb(reg_save, db->ioaddr);
+
+#if 0
+	dev->interrupt=0;              /* release interrupt lock */
+#endif
+}
+
+/*
+  Get statistics from driver.
+*/
+static struct enet_statistics * dmfe_get_stats(struct DEVICE *dev)
+{
+	board_info_t *db = (board_info_t *)dev->priv;
+
+	DMFE_DBUG(0, "dmfe_get_stats", 0);
+	return &db->stats;
+}
+
+/*
+  Process the upper socket ioctl command
+*/
+static int dmfe_do_ioctl(struct DEVICE *dev, struct ifreq *ifr, int cmd)
+{
+	DMFE_DBUG(0, "dmfe_do_ioctl()", 0);
+	return 0;
+}
+
+/*
+  A periodic timer routine
+  Dynamic media sense, allocated Rx buffer...
+*/
+static void dmfe_timer(unsigned long data)
+{
+	struct DEVICE *dev = (struct DEVICE *)data;
+	board_info_t *db = (board_info_t *)dev->priv;
+	u8 reg_save, tmp_reg;
+
+	DMFE_DBUG(0, "dmfe_timer()", 0);
+
+	/* Save previous register address */
+	reg_save = __raw_readb(db->ioaddr);
+
+	/* TX timeout check */
+	if (dev->trans_start && ((jiffies - dev->trans_start) > DMFE_TX_TIMEOUT)) {
+		db->device_wait_reset = 1;
+		db->reset_tx_timeout++;
+	}
+
+	/* DM9000 dynamic RESET check and do */
+	if (db->device_wait_reset) {
+#if 0
+		dev->tbusy = 1;
+#else
+		netif_stop_queue(dev);
+#endif
+		db->reset_counter++;
+		db->device_wait_reset = 0;
+		dev->trans_start = 0;
+		dmfe_init_dm9000(dev);
+
+#if 0
+		dev->tbusy = 0;		/* Active upper layer, send again */
+		mark_bh(NET_BH);
+#else
+		netif_start_queue(dev);
+#endif
+	}
+
+	/* Auto Sense Media mode policy:
+		FastEthernet NIC: don't need to do anything.
+		Media Force mode: don't need to do anything.
+		HomeRun/LongRun NIC and AUTO_Mode:
+			INT_MII not link, select EXT_MII
+			EXT_MII not link, select INT_MII
+	 */
+	if ( (db->nic_type != FASTETHER_NIC) && (db->op_mode & DM9000_AUTO) ) {
+		tmp_reg = ior(db, 0x01);	/* Got link status */
+		if ( !(tmp_reg & 0x40) ) { /* not link */
+			db->reg0 ^= 0x80;
+			iow(db, 0x00, db->reg0);
+		}
+	}
+
+	/* Restore previous register address */
+	__raw_writeb(reg_save, db->ioaddr);
+
+	/* Set timer again */
+	db->timer.expires = DMFE_TIMER_WUT;
+	add_timer(&db->timer);
+}
+
+/*
+  Received a packet and pass to upper layer
+*/
+static void dmfe_packet_receive(struct DEVICE *dev, board_info_t *db)
+{
+	struct sk_buff *skb;
+	u8 rxbyte;
+	u8 *rdptr;
+	u16 i, RxStatus, RxLen, GoodPacket, tmplen;
+
+	/* Check packet ready or not */
+	do {
+		rxbyte = ior(db, 0xf0);	/* Dummy read */
+		rxbyte = ior(db, 0xf0);	/* Got most updated data */
+
+		/* Status check: this byte must be 0 or 1 */
+		if (rxbyte > DM9000_PKT_RDY) {
+			iow(db, 0x05, 0x00);	/* Stop Device */
+			iow(db, 0xfe, 0x80);	/* Stop INT request */
+			db->device_wait_reset = 1;
+			db->reset_rx_status++;
+		}
+
+		/* packet ready to receive check */
+		if (rxbyte == DM9000_PKT_RDY) {
+			/* A packet ready now  & Get status/length */
+			GoodPacket = 1;
+			if (db->io_mode == 2) {
+				/* Byte mode */
+				RxStatus = ior(db, 0xf2) + (ior(db, 0xf2) << 8);
+				RxLen = ior(db, 0xf2) + (ior(db, 0xf2) << 8);
+			} else {
+				/* Word mode */
+				__raw_writeb(0xf2, db->ioaddr);
+				RxStatus = __raw_readw(db->io_data);
+				RxLen = __raw_readw(db->io_data);
+			}
+
+			/* Packet Status check */
+			if (RxLen < 0x40) {
+				GoodPacket = 0;
+				db->runt_length_counter++;
+			}
+			if (RxLen > DM9000_PKT_MAX) {
+				printk("<DM9000> RST: RX Len:%x\n", RxLen);
+				db->device_wait_reset = 1;
+				db->long_length_counter++;
+			}
+			if (RxStatus & 0xbf00) {
+				GoodPacket = 0;
+				if (RxStatus & 0x100) db->stats.rx_fifo_errors++;
+				if (RxStatus & 0x200) db->stats.rx_crc_errors++;
+				if (RxStatus & 0x8000) db->stats.rx_length_errors++;
+			}
+
+			/* Move data from DM9000 */
+			if (!db->device_wait_reset) {
+				if ( GoodPacket && ((skb = dev_alloc_skb(RxLen + 4)) != NULL ) ) {
+					skb->dev = dev;
+					skb_reserve(skb, 2);
+					rdptr = (u8 *) skb_put(skb, RxLen - 4);
+
+					/* Read received packet from RX SARM */
+					(db->inblk)(db->io_data, (unsigned short *)rdptr, RxLen);
+
+					/* Pass to upper layer */
+					skb->protocol = eth_type_trans(skb,dev);
+					netif_rx(skb);
+					db->stats.rx_packets++;
+				} else {
+					/* Without buffer or error packet */
+					if (db->io_mode == 2) {
+						/* Byte mode */
+						for (i = 0; i < RxLen; i++)
+							__raw_readb(db->io_data);
+					} else {
+						/* Word mode */
+						tmplen = (RxLen + 1) / 2;
+						for (i = 0; i < tmplen; i++)
+							__raw_readw(db->io_data);
+					}
+				}
+			}
+		}
+	}while( rxbyte  && !db->device_wait_reset);
+}
+
+/*
+  Read a word data from SROM
+*/
+static u16 read_srom_word(board_info_t *db, int offset)
+{
+	iow(db, 0xc, offset);
+	iow(db, 0xb, 0x4);
+	udelay(200);
+	iow(db, 0xb, 0x0);
+	return (ior(db, 0xd) + (ior(db, 0xe) << 8) );
+}
+
+/*
+  Set DM9000 multicast address
+*/
+static void dm9000_hash_table(struct DEVICE *dev)
+{
+	board_info_t *db = (board_info_t *)dev->priv;
+	struct dev_mc_list *mcptr = dev->mc_list;
+	int mc_cnt = dev->mc_count;
+	u32 hash_val;
+	u16 i, oft, hash_table[4];
+
+	DMFE_DBUG(0, "dm9000_hash_table()", 0);
+
+	/* Set Node address */
+	for (i = 0, oft = 0x10; i < 6; i++, oft++)
+		iow(db, oft, dev->dev_addr[i]);
+
+	/* Clear Hash Table */
+	for (i = 0; i < 4; i++)
+		hash_table[i] = 0x0;
+
+	/* broadcast address */
+	hash_table[3] = 0x8000;
+
+	/* the multicast address in Hash Table : 64 bits */
+	for (i = 0; i < mc_cnt; i++, mcptr = mcptr->next) {
+		hash_val = cal_CRC((char *)mcptr->dmi_addr, 6, 0) & 0x3f;
+		hash_table[hash_val / 16] |= (u16) 1 << (hash_val % 16);
+	}
+
+	/* Write the hash table to MAC MD table */
+	for (i = 0, oft = 0x16; i < 4; i++) {
+		iow(db, oft++, hash_table[i] & 0xff);
+		iow(db, oft++, (hash_table[i] >> 8) & 0xff);
+	}
+}
+
+/*
+  Calculate the CRC valude of the Rx packet
+  flag = 1 : return the reverse CRC (for the received packet CRC)
+         0 : return the normal CRC (for Hash Table index)
+*/
+static unsigned long cal_CRC(unsigned char * Data, unsigned int Len, u8 flag)
+{
+	unsigned long Crc = 0xffffffff;
+
+	while (Len--) {
+		Crc = CrcTable[(Crc ^ *Data++) & 0xFF] ^ (Crc >> 8);
+	}
+
+	if (flag) return ~Crc;
+	else return Crc;
+}
+
+/*
+   Read a word from phyxcer
+*/
+static u16 phy_read(board_info_t *db, int reg)
+{
+	/* Fill the phyxcer register into REG_0C */
+	iow(db, 0xc, DM9000_PHY | reg);
+
+	iow(db, 0xb, 0xc); /* Issue phyxcer read command */
+	udelay(100);	/* Wait read complete */
+	iow(db, 0xb, 0x0); /* Clear phyxcer read command */
+
+	/* The read data keeps on REG_0D & REG_0E */
+	return ( ior(db, 0xe) << 8 ) | ior(db, 0xd);
+}
+
+/*
+   Write a word to phyxcer
+*/
+static void phy_write(board_info_t *db, int reg, u16 value)
+{
+	/* Fill the phyxcer register into REG_0C */
+	iow(db, 0xc, DM9000_PHY | reg);
+
+	/* Fill the written data into REG_0D & REG_0E */
+	iow(db, 0xd, (value & 0xff));
+	iow(db, 0xe, ( (value >> 8) & 0xff));
+
+	iow(db, 0xb, 0xa);		/* Issue phyxcer write command */
+	udelay(500);		/* Wait write complete */
+	iow(db, 0xb, 0x0);		/* Clear phyxcer write command */
+}
+
+#ifdef MODULE
+
+    MODULE_AUTHOR("Sten Wang, sten_wang@davicom.com.tw");
+    MODULE_DESCRIPTION("BAST: Davicom DM9000 Fast Ethernet Driver");
+    MODULE_PARM(debug, "i");
+    MODULE_PARM(mode, "i");
+    MODULE_PARM(reg5, "i");
+    MODULE_PARM(reg9, "i");
+    MODULE_PARM(rega, "i");
+    MODULE_PARM(nfloor, "i");
+
+/* Description:
+   when user used insmod to add module, system invoked init_module()
+   to initilize and register.
+*/
+int init_module(void)
+{
+	DMFE_DBUG(0, "init_module() ", debug);
+
+	debug = 1;  // force debug
+
+	if (debug) dmfe_debug = debug;   /* set debug flag */
+
+	switch(mode) {
+	case DM9000_10MHD:
+	case DM9000_100MHD:
+	case DM9000_10MFD:
+	case DM9000_100MFD:
+	case DM9000_1M_HPNA:
+		media_mode = mode;
+		break;
+	default:
+		media_mode = DM9000_AUTO;
+	}
+
+	nfloor = (nfloor > 15) ? 0:nfloor;
+
+	return dmfe_bast_probe(0);              /* search board and register */
+}
+
+
+
+/* Description:
+   when user used rmmod to delete module, system invoked clean_module()
+   to  un-register DEVICE.
+*/
+void cleanup_module(void)
+{
+	struct DEVICE *next_dev;
+	board_info_t * db;
+
+	DMFE_DBUG(0, "clean_module()", 0);
+
+	while (dmfe_root_dev) {
+		next_dev = ((board_info_t *)dmfe_root_dev->priv)->next_dev;
+		unregister_netdev(dmfe_root_dev);
+		db = (board_info_t *)dmfe_root_dev->priv;
+		release_region(dmfe_root_dev->base_addr, 2);
+		kfree(db);		/* free board information */
+		kfree(dmfe_root_dev);	/* free device structure */
+		dmfe_root_dev = next_dev;
+	}
+
+	DMFE_DBUG(0, "clean_module() exit", 0);
+}
+
+#else
+
+static int __init
+dmfe_bast_init(void)
+{
+  return dmfe_bast_probe(NULL);
+}
+
+module_init(dmfe_bast_init);
+
+#endif  /* MODULE */
+/*
+ * Local variables:
+ *  version-control: t
+ *  kept-new-versions: 5
+ *  c-indent-level: 8
+ *  tab-width: 8
+ * End:
+ *
+ */
diff -urN linux-2.4.29/include/asm-armnommu/arch-okim67x/a.out.h linux-2.4.x/include/asm-armnommu/arch-okim67x/a.out.h
--- linux-2.4.29/include/asm-armnommu/arch-okim67x/a.out.h	1970-01-01 01:00:00.000000000 +0100
+++ linux-2.4.x/include/asm-armnommu/arch-okim67x/a.out.h	2005-11-22 18:43:50.000000000 +0000
@@ -0,0 +1,12 @@
+/*
+ * uclinux/include/asm-armnommu/arch-atmel/a.out.h
+ *
+ */
+#ifndef __ASM_ARCH_A_OUT_H
+#define __ASM_ARCH_A_OUT_H
+
+#ifdef __KERNEL__
+#endif
+
+#endif
+
diff -urN linux-2.4.29/include/asm-armnommu/arch-okim67x/cache.h linux-2.4.x/include/asm-armnommu/arch-okim67x/cache.h
--- linux-2.4.29/include/asm-armnommu/arch-okim67x/cache.h	1970-01-01 01:00:00.000000000 +0100
+++ linux-2.4.x/include/asm-armnommu/arch-okim67x/cache.h	2005-11-22 18:43:50.000000000 +0000
@@ -0,0 +1,46 @@
+/* include/asm-armnommu/arch-okim67x/gpio.h
+ *
+ * (c) 2005 Simtec Electronics
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ * 
+*/
+
+#define OKI_CACHE_CON	(0x78200004)
+#define OKI_CACHE_EN	(0x78200008)
+#define OKI_CACHE_FLUSH	(0x7820001C)
+
+#define CACHE_FLUSH_FLUSH	(1<<0)
+
+#define CACHE_CON_LCK_NONE	(0x00 << 25)
+#define CACHE_CON_LCK_WAY0	(0x01 << 25)
+#define CACHE_CON_LCK_WAY01	(0x02 << 25)
+#define CACHE_CON_LCK_WAY012	(0x03 << 25)
+#define CACHE_CON_LCK_MASK	(0x03 << 25)
+
+#define CACHE_CON_LOAD		(1<<27)
+#define CACHE_CON_BNK0		(0x00 << 28)
+#define CACHE_CON_BNK1		(0x01 << 28)
+#define CACHE_CON_BNK2		(0x02 << 28)
+#define CACHE_CON_BNK3		(0x03 << 28)
+
+#define CACHE_EN_C8		(1<<0)
+#define CACHE_EN_C9		(1<<1)
+#define CACHE_EN_C10		(1<<2)
+#define CACHE_EN_C11		(1<<3)
+#define CACHE_EN_C12		(1<<4)
+#define CACHE_EN_C13		(1<<5)
+#define CACHE_EN_C14		(1<<6)
+#define CACHE_EN_C15		(1<<7)
+#define CACHE_EN_C24		(1<<8)
+#define CACHE_EN_C25		(1<<0)
+#define CACHE_EN_C26		(1<<10)
+#define CACHE_EN_C27		(1<<11)
+#define CACHE_EN_C28		(1<<12)
+#define CACHE_EN_C29		(1<<13)
+#define CACHE_EN_C30		(1<<14)
+#define CACHE_EN_C31		(1<<15)
+#define CACHE_EN_C0		(1<<16)
diff -urN linux-2.4.29/include/asm-armnommu/arch-okim67x/dma.h linux-2.4.x/include/asm-armnommu/arch-okim67x/dma.h
--- linux-2.4.29/include/asm-armnommu/arch-okim67x/dma.h	1970-01-01 01:00:00.000000000 +0100
+++ linux-2.4.x/include/asm-armnommu/arch-okim67x/dma.h	2005-11-22 18:43:50.000000000 +0000
@@ -0,0 +1,14 @@
+/*
+ * asm/arch-armnommu/arch-p52/dma.h:
+ * Mindspeed 2001
+ */
+
+#ifndef __ASM_ARCH_DMA_H
+#define __ASM_ARCH_DMA_H
+
+
+#define MAX_DMA_ADDRESS		0x01000000
+#define MAX_DMA_CHANNELS        13
+#define arch_dma_init(dma_chan)
+
+#endif /* _ASM_ARCH_DMA_H */
diff -urN linux-2.4.29/include/asm-armnommu/arch-okim67x/gpio.h linux-2.4.x/include/asm-armnommu/arch-okim67x/gpio.h
--- linux-2.4.29/include/asm-armnommu/arch-okim67x/gpio.h	1970-01-01 01:00:00.000000000 +0100
+++ linux-2.4.x/include/asm-armnommu/arch-okim67x/gpio.h	2005-11-22 18:43:50.000000000 +0000
@@ -0,0 +1,99 @@
+/* include/asm-armnommu/arch-okim67x/gpio.h
+ *
+ * (c) 2005 Simtec Electronics
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ * 
+*/
+
+
+#define OKI_GPCTL	(0xB7000000)
+
+#define OKI_GPPOA	(0xB7A01000)
+#define OKI_GPPIA	(0xB7A01004)
+#define OKI_GPPMA	(0xB7A01008)
+#define OKI_GPPIEA	(0xB7A0100C)
+#define OKI_GPPIPA	(0xB7A01010)
+#define OKI_GPPISA	(0xB7A01014)
+
+#define OKI_GPPOB	(0xB7A01020)
+#define OKI_GPPIB	(0xB7A01024)
+#define OKI_GPPMB	(0xB7A01028)
+#define OKI_GPPIEB	(0xB7A0102C)
+#define OKI_GPPIPB	(0xB7A01030)
+#define OKI_GPPISB	(0xB7A01034)
+
+#define OKI_GPPOC	(0xB7A01040)
+#define OKI_GPPIC	(0xB7A01044)
+#define OKI_GPPMC	(0xB7A01048)
+#define OKI_GPPIEC	(0xB7A0104C)
+#define OKI_GPPIPC	(0xB7A01050)
+#define OKI_GPPISC	(0xB7A01054)
+
+#define OKI_GPPOD	(0xB7A01060)
+#define OKI_GPPID	(0xB7A01064)
+#define OKI_GPPMD	(0xB7A01068)
+#define OKI_GPPIED	(0xB7A0106C)
+#define OKI_GPPIPD	(0xB7A01070)
+#define OKI_GPPISD	(0xB7A01074)
+
+#define OKI_GPPOE	(0xB7A01080)
+#define OKI_GPPIE	(0xB7A01084)
+#define OKI_GPPME	(0xB7A01088)
+#define OKI_GPPIEE	(0xB7A0108C)
+#define OKI_GPPIPE	(0xB7A01090)
+#define OKI_GPPISE	(0xB7A01094)
+
+/* GPIO PIN mode control */
+
+#define OKI_GPCTL_UART	(1<<0)
+#define OKI_GPCTL_SIO	(1<<1)
+#define OKI_GPCTL_XA	(1<<2)
+#define OKI_GPCTL_DMA0	(1<<3)
+#define OKI_GPCTL_DMA1	(1<<4)
+#define OKI_GPCTL_PWM	(1<<5)
+#define OKI_GPCTL_XWAIT	(1<<6)
+#define OKI_GPCTL_XWR	(1<<7)
+#define OKI_GPCTL_SSIO	(1<<8)
+#define OKI_GPCTL_I2C	(1<<9)
+#define OKI_GPCTL_EXTI0	(1<<10)
+#define OKI_GPCTL_EXTI1	(1<<11)
+#define OKI_GPCTL_EXTI2	(1<<12)
+#define OKI_GPCTL_EXTI3	(1<<13)
+#define OKI_GPCTL_EFIQ	(1<<14)
+
+static __inline__ void gpctl_modify(unsigned int orr, unsigned int bic)
+{
+	unsigned long flags;
+	unsigned long gpctl;
+
+	local_irq_save(flags);
+
+	gpctl = __raw_readw(OKI_GPCTL);
+	gpctl |= orr;
+	gpctl &= ~bic;
+	__raw_writew(gpctl, OKI_GPCTL);
+
+	local_irq_restore(flags);
+}
+
+static __inline__ void gpio_change(unsigned int reg,
+				   unsigned int set, unsigned int clr)
+{
+
+	unsigned long flags;
+	unsigned long gpctl;
+
+	local_irq_save(flags);
+
+	gpctl = __raw_readw(reg);
+	gpctl |= set;
+	gpctl &= ~clr;
+	__raw_writew(gpctl, reg);
+
+	local_irq_restore(flags);
+
+}
diff -urN linux-2.4.29/include/asm-armnommu/arch-okim67x/hardware.h linux-2.4.x/include/asm-armnommu/arch-okim67x/hardware.h
--- linux-2.4.29/include/asm-armnommu/arch-okim67x/hardware.h	1970-01-01 01:00:00.000000000 +0100
+++ linux-2.4.x/include/asm-armnommu/arch-okim67x/hardware.h	2005-11-22 18:43:50.000000000 +0000
@@ -0,0 +1,134 @@
+/*
+ * linux/include/asm-arm/arch-oki/hardware.h
+ *
+ * (c) 2004 Simtec Electronics
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ *
+*/
+
+#ifndef __ASM_ARCH_HARDWARE_H
+#define __ASM_ARCH_HARDWARE_H
+
+#ifndef __ASSEMBLY__
+extern int oki_ml67500x;
+extern int oki_ml67400x;
+
+extern int oki_hclk;
+extern int oki_cclk;
+#endif
+
+#ifdef CONFIG_CPU_OKIM67500X
+/*
+ ******************* OKI ML67500X ********************
+ */
+
+#define ARM_CLK	60000000
+
+#define M67X_UART_BASE		(0xB7B00000)
+
+#define HARD_RESET_NOW()
+
+#define HW_M67X_TIMER_INIT(timer)	/* no PMC */
+
+
+#elif CONFIG_CPU_OKIM67400X
+/*
+ ******************* OKI ML67400X ********************
+ */
+
+#define ARM_CLK	25000000
+
+#define M67X_UART_BASE		(0xB7B00000)
+
+#define HARD_RESET_NOW()
+
+#define HW_M67X_TIMER_INIT(timer)	/* no PMC */
+
+#else
+  #error "Configuration error: No CPU defined"
+#endif
+
+
+/*
+ ******************* COMMON PART ********************
+ */
+
+/* 7.2.1 */
+
+#define OKI_BCKCTL        (0xB7000004)
+#define OKI_CLKSTP        (0xB8000004)
+#define OKI_CGBCNT0       (0xB8000008)
+#define OKI_CKWT          (0xB800000C)
+
+#define OKI_CLKGR_H(x)    (1 << ((x) & 7))
+#define OKI_CLKGR_C(x)    (1 << (((x) >> 4) & 7))
+
+/* 11.2.1 */
+#define OKI_BWC           (0x78100000)
+
+#define OKI_IRQREG(x)     (0x78000000 + (x))
+#define OKI_IRQREG2(x)    (0x7BF00000 + (x))
+
+#define OKI_IRQ             OKI_IRQREG(0x00)    /* 0x78000000 */
+
+/* 8.4.2 */
+#define OKI_IRQS            OKI_IRQREG(0x04)    /* 0x78000004 */
+
+/* 8.4.3 */
+#define OKI_FIQ             OKI_IRQREG(0x08)    /* 0x78000008 */
+#define OKI_FIQ_FIQ                   (0x01)
+
+/* 8.4.4 */
+#define OKI_FIQRAW          OKI_IRQREG(0x0C)    /* 0x7800000C */
+#define OKI_FIQRAW_FIQRAW             (0x01)
+
+/* 8.4.5 */
+#define OKI_FIQEN           OKI_IRQREG(0x10)    /* 0x78000010 */
+#define OKI_FIQEN_FIQEN               (0x01)
+
+/* 8.4.6 */
+#define OKI_IRN             OKI_IRQREG(0x14)    /* 0x78000014 */
+#define OKI_IRN_MASK                  (0x3f)
+
+/* 8.4.7 */
+#define OKI_CIL             OKI_IRQREG(0x18)    /* 0x78000018 */
+#define OKI_CIL_GET(x)      (((x) >> 1) & 0x3f)
+
+/* 8.4.8 */
+#define OKI_ILC0            OKI_IRQREG(0x20)    /* 0x78000020 */
+
+#define OKI_ILC0_MASK                 (0x07)
+#define OKI_ILC0_ILR0_SHIFT           (0)
+#define OKI_ILC0_ILR1_SHIFT           (4)
+#define OKI_ILC0_ILR4_SHIFT           (16)
+#define OKI_ILC0_ILR6_SHIFT           (24)
+
+/* 8.4.9 */
+#define OKI_ILC1            OKI_IRQREG(0x24)    /* 0x78000024 */
+
+#define OKI_ILC1_MASK                 (0x07)
+#define OKI_ILC1_ILR8_SHIFT           (0)
+#define OKI_ILC1_ILR9_SHIFT           (4)
+#define OKI_ILC1_ILR10_SHIFT          (8)
+#define OKI_ILC1_ILR11_SHIFT          (12)
+#define OKI_ILC1_ILR12_SHIFT          (16)
+#define OKI_ILC1_ILR13_SHIFT          (20)
+#define OKI_ILC1_ILR14_SHIFT          (24)
+#define OKI_ILC1_ILR15_SHIFT          (28)
+
+/* 8.4.10 */
+#define OKI_CILCL           OKI_IRQREG(0x28)    /* 0x78000028 */
+#define OKI_CILE            OKI_IRQREG(0x2C)    /* 0x7800002C */
+
+/* these next bits seem to be fore IRQs 31..16 */
+
+#define OKI_IRCL            OKI_IRQREG2(0x04)   /* 0x7BF00004 */
+#define OKI_IRQA            OKI_IRQREG2(0x10)   /* 0x7BF00010 */
+#define OKI_IDM             OKI_IRQREG2(0x14)   /* 0x7BF00014 */
+#define OKI_ILC             OKI_IRQREG2(0x18)   /* 0x7BF00018 */
+
+#endif  /* _ASM_ARCH_HARDWARE_H */
diff -urN linux-2.4.29/include/asm-armnommu/arch-okim67x/ide.h linux-2.4.x/include/asm-armnommu/arch-okim67x/ide.h
--- linux-2.4.29/include/asm-armnommu/arch-okim67x/ide.h	1970-01-01 01:00:00.000000000 +0100
+++ linux-2.4.x/include/asm-armnommu/arch-okim67x/ide.h	2005-11-22 18:43:50.000000000 +0000
@@ -0,0 +1,43 @@
+/*
+ * linux/include/asm-arm/arch-oki/ide.h
+ *
+ * Copyright (c) 1998 Hugo Fiennes & Nicolas Pitre
+ *
+ * 18-aug-2000: Cleanup by Erik Mouw (J.A.K.Mouw@its.tudelft.nl)
+ *              Get rid of the special ide_init_hwif_ports() functions
+ *              and make a generalised function that can be used by all
+ *              architectures.
+ */
+
+#include <linux/config.h>
+#include <asm/irq.h>
+#include <asm/hardware.h>
+#include <asm/mach-types.h>
+
+
+/*
+ * Set up a hw structure for a specified data port, control port and IRQ.
+ * This should follow whatever the default interface uses.
+ */
+static __inline__ void
+ide_init_hwif_ports(hw_regs_t *hw, int data_port, int ctrl_port, int *irq)
+{
+#ifdef CONFIG_REVISIT
+#error Not sure what to do for ide_init_hwif_ports
+#endif
+}
+
+
+
+
+/*
+ * This registers the standard ports for this architecture with the IDE
+ * driver.
+ */
+static __inline__ void
+ide_init_default_hwifs(void)
+{
+#ifdef CONFIG_REVISIT
+#error Not sure what to do for ide_init_default_hwifs
+#endif
+}
diff -urN linux-2.4.29/include/asm-armnommu/arch-okim67x/io.h linux-2.4.x/include/asm-armnommu/arch-okim67x/io.h
--- linux-2.4.29/include/asm-armnommu/arch-okim67x/io.h	1970-01-01 01:00:00.000000000 +0100
+++ linux-2.4.x/include/asm-armnommu/arch-okim67x/io.h	2005-11-22 18:43:50.000000000 +0000
@@ -0,0 +1,46 @@
+/*
+ * linux/include/asm-armnommu/arch-oki/io.h
+ *
+ * Copyright (C) 1997-1999 Russell King
+ *
+ * Modifications:
+ *  06-12-1997	RMK	Created.
+ *  07-04-1999	RMK	Major cleanup
+ *  02-19-2001  gjm     Leveraged for armnommu/dsc21
+ *  06-02-2004  vrs     Copied from atmel AT91 stuff
+ */
+#ifndef __ASM_ARM_ARCH_IO_H
+#define __ASM_ARM_ARCH_IO_H
+
+/*
+ * kernel/resource.c uses this to initialize the global ioport_resource struct
+ * which is used in all calls to request_resource(), allocate_resource(), etc.
+ * --gmcnutt
+ */
+#define IO_SPACE_LIMIT 0xffffffff
+
+/*
+ * If we define __io then asm/io.h will take care of most of the inb & friends
+ * macros. It still leaves us some 16bit macros to deal with ourselves, though.
+ * We don't have PCI or ISA on the dsc21 so I dropped __mem_pci & __mem_isa.
+ * --gmcnutt
+ */
+#define __io(a) (CONFIG_IO16_BASE + (a))
+#define __iob(a) (CONFIG_IO8_BASE + (a))	// byte io address
+#define __mem_pci(a)	((unsigned long)(a))
+
+#define __arch_getw(a) (*(volatile unsigned short *)(a))
+#define __arch_putw(v,a) (*(volatile unsigned short *)(a) = (v))
+
+/*
+ * Defining these two gives us ioremap for free. See asm/io.h.
+ * --gmcnutt
+ */
+#define iomem_valid_addr(iomem,sz) (1)
+#define iomem_to_phys(iomem) (iomem)
+
+#ifdef CONFIG_CPU_BIG_ENDIAN
+#define __io_noswap 1
+#endif
+
+#endif
diff -urN linux-2.4.29/include/asm-armnommu/arch-okim67x/irq.h linux-2.4.x/include/asm-armnommu/arch-okim67x/irq.h
--- linux-2.4.29/include/asm-armnommu/arch-okim67x/irq.h	1970-01-01 01:00:00.000000000 +0100
+++ linux-2.4.x/include/asm-armnommu/arch-okim67x/irq.h	2005-11-22 18:43:50.000000000 +0000
@@ -0,0 +1,43 @@
+/*
+ * asm/arch-oki/irq.h:
+ * 2001 V. R. Sanders
+ */
+
+#ifndef __ASM_ARCH_IRQ_H__
+#define __ASM_ARCH_IRQ_H__
+
+
+#include <asm/hardware.h>
+#include <asm/io.h>
+#include <asm/mach/irq.h>
+#include <asm/arch/irqs.h>
+
+
+#define fixup_irq(x) (x)
+
+extern void m67x_mask_irq(unsigned int irq);
+extern void m67x_unmask_irq(unsigned int irq);
+extern void m67x_mask_ack_irq(unsigned int irq);
+extern void m67x_init_aic(void);
+
+static __inline__ void irq_init_irq(void)
+{
+	int irq;
+
+	m67x_init_aic();
+
+	for (irq = 0; irq < NR_IRQS; irq++) {
+
+	        if (!VALID_IRQ(irq)) continue;
+
+		irq_desc[irq].valid	= 1;
+		irq_desc[irq].probe_ok	= 1;
+		irq_desc[irq].mask_ack	= m67x_mask_ack_irq;
+		irq_desc[irq].mask	= m67x_mask_irq;
+		irq_desc[irq].unmask	= m67x_unmask_irq;
+	}
+}
+
+
+
+#endif /* __ASM_ARCH_IRQ_H__ */
diff -urN linux-2.4.29/include/asm-armnommu/arch-okim67x/irqs.h linux-2.4.x/include/asm-armnommu/arch-okim67x/irqs.h
--- linux-2.4.29/include/asm-armnommu/arch-okim67x/irqs.h	1970-01-01 01:00:00.000000000 +0100
+++ linux-2.4.x/include/asm-armnommu/arch-okim67x/irqs.h	2005-11-22 18:43:50.000000000 +0000
@@ -0,0 +1,60 @@
+/*
+ * asm/arch-oki/irqs.h:
+ * (c) 2004 V. R. Sanders
+ */
+#ifndef __ASM_ARCH_IRQS_H__
+#define __ASM_ARCH_IRQS_H__
+
+
+#if defined(CONFIG_CPU_OKIM67400X) || defined(CONFIG_CPU_OKIM67500X)
+/*
+ ******************* OKI67[45]00X ********************
+ */
+
+#define NR_IRQS		32
+#define VALID_IRQ(i)	((i)>=IRQ_SYSTIMER && (i)<NR_IRQS)
+
+#define CPU_IRQ(x) (x)
+
+#define IRQ_SYSTIMER           CPU_IRQ(0)
+#define IRQ_WATCHDOG           CPU_IRQ(1)
+#define IRQ_WATCHDOG_INTERVAL  CPU_IRQ(2)
+#define IRQ_GPIOA              CPU_IRQ(4)
+#define IRQ_UNUSED5            CPU_IRQ(5)
+#define IRQ_CPIOB              CPU_IRQ(6)
+#define IRQ_CPIOC              CPU_IRQ(7)
+#define IRQ_CPIODE             CPU_IRQ(8)
+#define IRQ_SOFT               CPU_IRQ(9)
+
+#define IRQ_SIO                CPU_IRQ(10)
+#define IRQ_AD                 CPU_IRQ(11)
+#define IRQ_OWM0               CPU_IRQ(12)
+#define IRQ_PWM1               CPU_IRQ(13)
+#define IRQ_SSIO               CPU_IRQ(14)
+
+#define IRQ_I2C                CPU_IRQ(15)
+#define IRQ_TIMER0             CPU_IRQ(16)
+#define IRQ_TIMER1             CPU_IRQ(17)
+#define IRQ_TIMER2             CPU_IRQ(18)
+#define IRQ_TIMER3             CPU_IRQ(19)
+
+#define IRQ_TIMER4             CPU_IRQ(20)
+#define IRQ_TIMER5             CPU_IRQ(21)
+#define IRQ_EXT0               CPU_IRQ(22)
+#define IRQ_UNUSED23           CPU_IRQ(23)
+#define IRQ_DMA0               CPU_IRQ(24)
+
+#define IRQ_DMA1               CPU_IRQ(25)
+#define IRQ_EXT1               CPU_IRQ(26)
+#define IRQ_UNUSED27           CPU_IRQ(27)
+#define IRQ_EXT2               CPU_IRQ(28)
+#define IRQ_UNUSED29           CPU_IRQ(29)
+#define IRQ_UNUSED30           CPU_IRQ(30)
+
+#define IRQ_EXT3               CPU_IRQ(31)
+
+#else
+  #error "Configuration error: No CPU defined"
+#endif
+
+#endif /* __ASM_ARCH_IRQS_H__ */
diff -urN linux-2.4.29/include/asm-armnommu/arch-okim67x/keyboard.h linux-2.4.x/include/asm-armnommu/arch-okim67x/keyboard.h
--- linux-2.4.29/include/asm-armnommu/arch-okim67x/keyboard.h	1970-01-01 01:00:00.000000000 +0100
+++ linux-2.4.x/include/asm-armnommu/arch-okim67x/keyboard.h	2005-11-22 18:43:50.000000000 +0000
@@ -0,0 +1,39 @@
+/*
+ *  linux/include/asm-arm/arch-oki/keyboard.h
+ *
+ *  Copyright (C) 2000 RidgeRun, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ *  Keyboard driver definitions for ARM
+ */
+#ifndef __ASM_ARM_ARCH_OKI_KEYBOARD_H
+#define __ASM_ARM_ARCH_OKI_KEYBOARD_H
+
+#if 0
+#define kbd_request_region
+#define kbd_write_command
+#define kbd_write_output
+#define kbd_read_status
+#define kbd_read_input
+#define aux_request_irq
+#define aux_free_irq
+#endif
+
+/*
+ * Required by drivers/char/keyboard.c. I took these from arch-arc.
+ * --gmcnutt
+ */
+#define kbd_setkeycode(sc,kc) (-EINVAL)
+#define kbd_getkeycode(sc) (-EINVAL)
+#define kbd_translate(sc,kcp,rm) ({ *(kcp) = (sc); 1; })
+#define kbd_unexpected_up(kc) (0200)
+#define kbd_leds(leds)
+#define kbd_init_hw()
+#define kbd_enable_irq() /* what irq? ;) --gmcnutt */
+#define kbd_disable_irq()
+
+
+#endif /* __ASM_ARM_ARCH_OKI_KEYBOARD_H */
diff -urN linux-2.4.29/include/asm-armnommu/arch-okim67x/memory.h linux-2.4.x/include/asm-armnommu/arch-okim67x/memory.h
--- linux-2.4.29/include/asm-armnommu/arch-okim67x/memory.h	1970-01-01 01:00:00.000000000 +0100
+++ linux-2.4.x/include/asm-armnommu/arch-okim67x/memory.h	2005-11-22 18:43:50.000000000 +0000
@@ -0,0 +1,23 @@
+/*
+ * linux/include/asm-armnommu/arch-atmel/memory.h
+ *
+ * Copyright (c) 1999 Nicolas Pitre <nico@cam.org>
+ * 2001 Mindspeed
+ */
+
+#ifndef __ASM_ARCH_MEMORY_H
+#define __ASM_ARCH_MEMORY_H
+
+#define TASK_SIZE	(0x01a00000UL)
+#define TASK_SIZE_26	TASK_SIZE
+
+#define PHYS_OFFSET	(DRAM_BASE)
+#define PAGE_OFFSET PHYS_OFFSET
+#define END_MEM     (DRAM_BASE + DRAM_SIZE)
+
+#define __virt_to_phys(vpage) ((unsigned long) (vpage))
+#define __phys_to_virt(ppage) ((void *) (ppage))
+#define __virt_to_bus(vpage) ((unsigned long) (vpage))
+#define __bus_to_virt(ppage) ((void *) (ppage))
+
+#endif
diff -urN linux-2.4.29/include/asm-armnommu/arch-okim67x/param.h linux-2.4.x/include/asm-armnommu/arch-okim67x/param.h
--- linux-2.4.29/include/asm-armnommu/arch-okim67x/param.h	1970-01-01 01:00:00.000000000 +0100
+++ linux-2.4.x/include/asm-armnommu/arch-okim67x/param.h	2005-11-22 18:43:50.000000000 +0000
@@ -0,0 +1,6 @@
+#ifndef __ARCH_ASM_PARAM_H__
+#define __ARCH_ASM_PARAM_H__
+
+/* nothing for now */
+
+#endif /* __ARCH_ASM_PARAM_H__ */
diff -urN linux-2.4.29/include/asm-armnommu/arch-okim67x/pcmcia.h linux-2.4.x/include/asm-armnommu/arch-okim67x/pcmcia.h
--- linux-2.4.29/include/asm-armnommu/arch-okim67x/pcmcia.h	1970-01-01 01:00:00.000000000 +0100
+++ linux-2.4.x/include/asm-armnommu/arch-okim67x/pcmcia.h	2005-11-22 18:43:50.000000000 +0000
@@ -0,0 +1,3 @@
+#ifdef CONFIG_REVISIT
+#error Do we need PCMCIA support?
+#endif
diff -urN linux-2.4.29/include/asm-armnommu/arch-okim67x/processor.h linux-2.4.x/include/asm-armnommu/arch-okim67x/processor.h
--- linux-2.4.29/include/asm-armnommu/arch-okim67x/processor.h	1970-01-01 01:00:00.000000000 +0100
+++ linux-2.4.x/include/asm-armnommu/arch-okim67x/processor.h	2005-11-22 18:43:50.000000000 +0000
@@ -0,0 +1,15 @@
+/*
+ * uclinux/include/asm-armnommu/arch-oki/mmu.h
+ *
+ */
+#ifndef __ASM_ARCH_PROCESSOR_H
+#define __ASM_ARCH_PROCESSOR_H
+
+#define EISA_bus 0
+#define EISA_bus__is_a_macro
+#define MCA_bus 0
+#define MCA_bus__is_a_macro
+
+#define TASK_SIZE (0x01a00000UL)
+
+#endif
diff -urN linux-2.4.29/include/asm-armnommu/arch-okim67x/serial.h linux-2.4.x/include/asm-armnommu/arch-okim67x/serial.h
--- linux-2.4.29/include/asm-armnommu/arch-okim67x/serial.h	1970-01-01 01:00:00.000000000 +0100
+++ linux-2.4.x/include/asm-armnommu/arch-okim67x/serial.h	2005-11-22 20:47:54.000000000 +0000
@@ -0,0 +1,17 @@
+/*
+ *  linux/include/asm-arm/arch-oki/serial.h
+ */
+#ifndef __ASM_ARCH_SERIAL_H
+#define __ASM_ARCH_SERIAL_H
+
+/* need to config standard uart here */
+
+#define BASE_BAUD (25000000 / 16)
+
+#define RS_TABLE_SIZE 8
+
+#define STD_SERIAL_PORT_DEFNS
+
+#define EXTRA_SERIAL_PORT_DEFNS
+
+#endif
diff -urN linux-2.4.29/include/asm-armnommu/arch-okim67x/shmparam.h linux-2.4.x/include/asm-armnommu/arch-okim67x/shmparam.h
--- linux-2.4.29/include/asm-armnommu/arch-okim67x/shmparam.h	1970-01-01 01:00:00.000000000 +0100
+++ linux-2.4.x/include/asm-armnommu/arch-okim67x/shmparam.h	2005-11-22 18:43:50.000000000 +0000
@@ -0,0 +1,5 @@
+/*
+ * linux/include/asm-arm/arch-oki/shmparam.h
+ *
+ * Copyright (c) 1996 Russell King.
+ */
diff -urN linux-2.4.29/include/asm-armnommu/arch-okim67x/sio.h linux-2.4.x/include/asm-armnommu/arch-okim67x/sio.h
--- linux-2.4.29/include/asm-armnommu/arch-okim67x/sio.h	1970-01-01 01:00:00.000000000 +0100
+++ linux-2.4.x/include/asm-armnommu/arch-okim67x/sio.h	2005-11-22 18:43:50.000000000 +0000
@@ -0,0 +1,31 @@
+/*
+ * linux/include/asm-arm/arch-oki/sio.h
+ * for OKI m67x series SIO port (NOT UART)
+ * 200 V. R. Sanders
+ */
+
+#define OKI_SIOBUF	(0xB8002000)
+#define OKI_SIOSTA	(0xB8002004)
+#define OKI_SIOCON	(0xB8002008)
+#define OKI_SIOBCN	(0xB800200C)
+#define OKI_SIOBT	(0xB8002014)
+#define OKI_SIOTCN	(0xB8002018)
+
+#define OKI_SIOSTA_FERR		(1<<0)
+#define OKI_SIOSTA_OERR		(1<<1)
+#define OKI_SIOSTA_PERR		(1<<2)
+#define OKI_SIOSTA_RVIRQ	(1<<4)
+#define OKI_SIOSTA_TRIRQ	(1<<5)
+
+#define OKI_SIOSTA_ANYIRQ (OKI_SIOSTA_TRIRQ|OKI_SIOSTA_RVIRQ)
+
+#define OKI_SIOCON_LN7		(1<<0)
+#define OKI_SIOCON_PEN		(1<<1)
+#define OKI_SIOCON_EVN		(1<<2)
+#define OKI_SIOCON_TSTB		(1<<3)
+
+#define OKI_SIOBCN_BGRUN	(1<<4)
+
+#define OKI_SIOTCN_MFERR	(1<<0)
+#define OKI_SIOTCN_MPERR	(1<<1)
+#define OKI_SIOTCN_LBTST	(1<<7)
diff -urN linux-2.4.29/include/asm-armnommu/arch-okim67x/system.h linux-2.4.x/include/asm-armnommu/arch-okim67x/system.h
--- linux-2.4.29/include/asm-armnommu/arch-okim67x/system.h	1970-01-01 01:00:00.000000000 +0100
+++ linux-2.4.x/include/asm-armnommu/arch-okim67x/system.h	2005-11-22 20:47:54.000000000 +0000
@@ -0,0 +1,30 @@
+/*
+ * linux/include/asm-armnommu/arch-oki/system.h
+ * 2001 Mindspeed
+ */
+
+#include <asm/arch/watchdog.h>
+
+static inline void arch_idle(void)
+{
+	while (!current->need_resched && !hlt_counter)
+	  cpu_do_idle(IDLE_WAIT_SLOW);
+}
+
+extern inline void arch_reset(char mode)
+{
+	printk("arch_reset: mode %c\n", mode);
+
+	/* set the watchdog going */
+
+	if (mode == 'h') {
+		writeb(WDTBCON_PROTECT, WDTBCON);
+		writeb(WDTBCON_WDCLK_DIV32 | WDTBCON_SYSRST, WDTBCON);
+
+		writeb(WDTCON_START, WDTCON);
+
+		udelay(1000);
+
+		printk(KERN_ERR "watchdog reset failed?\n");
+	}
+}
diff -urN linux-2.4.29/include/asm-armnommu/arch-okim67x/time.h linux-2.4.x/include/asm-armnommu/arch-okim67x/time.h
--- linux-2.4.29/include/asm-armnommu/arch-okim67x/time.h	1970-01-01 01:00:00.000000000 +0100
+++ linux-2.4.x/include/asm-armnommu/arch-okim67x/time.h	2005-11-22 18:43:50.000000000 +0000
@@ -0,0 +1,91 @@
+/*
+ * linux/include/asm-armnommu/arch-oki/time.h
+ *
+ * Copyright gufff
+ *
+ * Ben Dooks
+*/
+
+#define OKI_TIMECNTL   (0x00)
+#define OKI_TIMECNTL_IRQEN (1<<4)
+#define OKI_TIMECNTL_START (1<<3)
+#define OKI_TIMECNTL_DIV32 (5<<5)
+
+#define OKI_TIMEBASE   (0x04)
+#define OKI_TIMECNT    (0x08)
+#define OKI_TIMECMP    (0x0C)
+#define OKI_TIMESTAT   (0x10)
+
+#define OKI_TIMER0     (0xB7F00000)
+#define OKI_TIMER1     (0xB7F00020)
+#define OKI_TIMER2     (0xB7F00040)
+#define OKI_TIMER3     (0xB7F00060)
+#define OKI_TIMER4     (0xB7F00080)
+#define OKI_TIMER5     (0xB7F000A0)
+
+#define WHICH_TIMER  (OKI_TIMER5)
+
+#define SYS_CLK (oki_cclk)
+#define TMR_CLK (SYS_CLK / 32)
+
+#define TMR_VAL (TMR_CLK / HZ)
+
+#define __arch_readl(addr) (*((unsigned volatile int *)(addr)))
+
+#define __arch_writel(data,addr) \
+  do { *((volatile unsigned int *)(addr)) = (data); } while(0)
+
+
+static unsigned long oki_gettimeoffset (void)
+{
+  unsigned int tmrcnt = __arch_readl(WHICH_TIMER + OKI_TIMECNT);
+  /* get offset from last tick */
+
+  /* check maths on this... */
+  tmrcnt *= (TMR_VAL / 1000);
+  tmrcnt /= 1000;
+
+  return 0;
+}
+
+static void oki_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
+{
+  /* clear timer */
+  __arch_writel(0x01, WHICH_TIMER + OKI_TIMESTAT);
+
+  do_timer(regs);
+  do_profile(regs);
+
+}
+
+
+extern inline void setup_timer (void)
+{
+  unsigned int tmr = WHICH_TIMER;
+
+  /* shut down before using */
+  printk("Initialising timer:\n");
+
+	__arch_writel(OKI_TIMECNTL_DIV32, tmr + OKI_TIMECNTL);
+	 
+        gettimeoffset = oki_gettimeoffset;
+        timer_irq.handler = oki_timer_interrupt;
+
+	printk("registering timer interrupt...\n");
+
+        setup_arm_irq(IRQ_TIMER5, &timer_irq);
+
+	printk("enabling timer...\n");
+
+	/* enable the timer */
+
+	printk("TMR_VAL = %08x\n", TMR_VAL);
+
+
+	__arch_writel(0x00, tmr + OKI_TIMEBASE);
+	__arch_writel(TMR_VAL, tmr + OKI_TIMECMP);
+
+	__arch_writel(OKI_TIMECNTL_DIV32 | OKI_TIMECNTL_START | OKI_TIMECNTL_IRQEN, tmr + OKI_TIMECNTL);
+
+	printk("timer enabled\n");
+}
diff -urN linux-2.4.29/include/asm-armnommu/arch-okim67x/timex.h linux-2.4.x/include/asm-armnommu/arch-okim67x/timex.h
--- linux-2.4.29/include/asm-armnommu/arch-okim67x/timex.h	1970-01-01 01:00:00.000000000 +0100
+++ linux-2.4.x/include/asm-armnommu/arch-okim67x/timex.h	2005-11-22 18:43:50.000000000 +0000
@@ -0,0 +1,24 @@
+/*
+ * timex.h:
+ * 2001 Mindspeed
+ */
+#ifndef __ASM_ARCH_TIMEX_H__
+#define __ASM_ARCH_TIMEX_H__
+
+#define CLOCK_TICK_RATE	   0x270f
+
+#endif /* __ASM_ARCH_TIMEX_H__ */
+
+
+
+
+
+
+
+
+
+
+
+
+
+
diff -urN linux-2.4.29/include/asm-armnommu/arch-okim67x/uncompress.h linux-2.4.x/include/asm-armnommu/arch-okim67x/uncompress.h
--- linux-2.4.29/include/asm-armnommu/arch-okim67x/uncompress.h	1970-01-01 01:00:00.000000000 +0100
+++ linux-2.4.x/include/asm-armnommu/arch-okim67x/uncompress.h	2005-11-22 18:43:50.000000000 +0000
@@ -0,0 +1,58 @@
+/*
+ * asm/arch/uncompress.c:
+ *         Optional routines to aid in debugging the decompression phase
+ *         of kernel boot.
+ * copyright:
+ *         (C) 2001 RidgeRun, Inc. (http://www.ridgerun.com)
+ * author: Gordon McNutt <gmcnutt@ridgerun.com>
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ *
+ * THIS  SOFTWARE  IS PROVIDED   ``AS  IS'' AND   ANY  EXPRESS OR IMPLIED
+ * WARRANTIES,   INCLUDING, BUT NOT  LIMITED  TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
+ * NO  EVENT  SHALL   THE AUTHOR  BE    LIABLE FOR ANY   DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED   TO, PROCUREMENT OF  SUBSTITUTE GOODS  OR SERVICES; LOSS OF
+ * USE, DATA,  OR PROFITS; OR  BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ * ANY THEORY OF LIABILITY, WHETHER IN  CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * You should have received a copy of the  GNU General Public License along
+ * with this program; if not, write  to the Free Software Foundation, Inc.,
+ * 675 Mass Ave, Cambridge, MA 02139, USA.
+ *
+ */
+
+/*
+ * This is used by arch/armnommu/boot/compressed/misc.c to write progress info
+ * out the serial port so that the user can see debug messages up to the point
+ * where the kernel is decompressed. The STANDALONE_DEBUG macro chooses between
+ * this and the standard printf. Punt.
+ * --gmcnutt
+ */
+
+#include <asm/hardware.h>
+
+#ifdef CONFIG_SERIAL_OKI_CONSOLE
+#define putc(c)
+/*
+ * If we need to do some setup prior to decompression (like initializing the
+ * UART if we want to use puts() above) then we define it here. Punt.
+ */
+#define arch_decomp_setup()
+
+#else
+#define puts(s)
+#define arch_decomp_setup()
+#endif
+
+/*
+ * Not sure what this is for. Probably an optional watchdog to check if the
+ * decompress got hung so we can warn the user. Punt.
+ */
+#define arch_decomp_wdog()
diff -urN linux-2.4.29/include/asm-armnommu/arch-okim67x/vmalloc.h linux-2.4.x/include/asm-armnommu/arch-okim67x/vmalloc.h
--- linux-2.4.29/include/asm-armnommu/arch-okim67x/vmalloc.h	1970-01-01 01:00:00.000000000 +0100
+++ linux-2.4.x/include/asm-armnommu/arch-okim67x/vmalloc.h	2005-11-22 18:43:50.000000000 +0000
@@ -0,0 +1,32 @@
+/*
+ *  linux/include/asm-arm/arch-oki/vmalloc.h
+ *
+ *  Copyright (C) 2000 Russell King.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+
+/*
+ * Just any arbitrary offset to the start of the vmalloc VM area: the
+ * current 8MB value just means that there will be a 8MB "hole" after the
+ * physical memory until the kernel virtual memory starts.  That means that
+ * any out-of-bounds memory accesses will hopefully be caught.
+ * The vmalloc() routines leaves a hole of 4kB between each vmalloced
+ * area for the same reason. ;)
+ */
+#define VMALLOC_OFFSET	  (8*1024*1024)
+#define VMALLOC_START	  (((unsigned long)high_memory + VMALLOC_OFFSET) & ~(VMALLOC_OFFSET-1))
+#define VMALLOC_VMADDR(x) ((unsigned long)(x))
+#define VMALLOC_END       (PAGE_OFFSET + 0x10000000)
diff -urN linux-2.4.29/include/asm-armnommu/arch-okim67x/watchdog.h linux-2.4.x/include/asm-armnommu/arch-okim67x/watchdog.h
--- linux-2.4.29/include/asm-armnommu/arch-okim67x/watchdog.h	1970-01-01 01:00:00.000000000 +0100
+++ linux-2.4.x/include/asm-armnommu/arch-okim67x/watchdog.h	2005-11-22 20:47:54.000000000 +0000
@@ -0,0 +1,23 @@
+/* (c) 2005 Ben Dooks */
+
+#define WDTCON_REG(x)		((x) + 0xB7E00000)
+
+#define WDTCON			WDTCON_REG(0x00)
+#define WDTCON_START		0x3C
+
+#define WDTBCON			WDTCON_REG(0x04)
+#define WDTBCON_PROTECT		(0x5A)
+#define WDTBCON_WDCLK_MASK	(0x03)
+#define WDTBCON_WDCLK_DIV32	(0x00)
+#define WDTBCON_WDCLK_DIV64	(0x01)
+#define WDTBCON_WDCLK_DIV128	(0x02)
+#define WDTBCON_WDCLK_DIV256	(0x03)
+#define WDTBCON_ITM		(0x08)
+#define WDTBCON_ITEN		(0x10)
+#define WDTBCON_SYSRST		(0x40)
+#define WDTBCON_HALT		(0x80)
+
+#define WDSTAT			WDTCON_REG(0x14)
+#define WDSTAT_WDRST		(0x01)
+#define WDSTAT_IST		(0x10)
+#define WDSTAT_IVIST		(0x20)
diff -urN linux-2.4.29/net/Config.in linux-2.4.x/net/Config.in
--- linux-2.4.29/net/Config.in	2005-11-22 18:34:17.000000000 +0000
+++ linux-2.4.x/net/Config.in	2005-11-22 18:43:50.000000000 +0000
@@ -110,10 +110,12 @@
 
 tristate 'IP Security Protocol (FreeS/WAN IPSEC)' CONFIG_IPSEC
 if [ "$CONFIG_IPSEC" != "n" ]; then
+  comment FreeSWAN
   source ../freeswan/klips/net/ipsec/Config.in
 fi
 tristate 'IP Security Protocol (Openswan IPSEC)' CONFIG_KLIPS
 if [ "$CONFIG_KLIPS" != "n" ]; then
+  comment OpenSWAN
   source ../openswan/linux/net/ipsec/Config.in
 fi
 
