Signal Name Total Product Terms Product Terms Location Power Mode Pin Number PinType Pin Use
D<14> 2  1_1 1_2 MC1 STD 41 I/O I/O
VertState_FFd2 4  2_1 2_2 2_3 2_4 MC2 STD 32 I/O (b)
VertState_FFd1 4  3_1 3_2 3_3 3_4 MC3 STD 49 I/O I
VertCount<8> 5  4_1 4_2 4_3 4_4 4_5 MC4 STD 50 I/O (b)
D<9> 2  5_1 5_2 MC5 STD 35 I/O I/O
(unused) 0   MC6   53 I/O  
SA0 3  7_1 7_2 7_3 MC7 STD 54 I/O O
D<11> 2  8_1 8_2 MC8 STD 37 I/O I/O
D<15> 2  9_1 9_2 MC9 STD 42 I/O I/O
Addr<5> 3  10_1 10_2 10_3 MC10 STD 60 I/O O
(unused) 0   MC11   52 I/O  
Addr<4> 3  12_1 12_2 12_3 MC12 STD 61 I/O O
Addr<13> 4  13_1 13_2 13_3 13_4 MC13 STD 63 I/O O
Addr<8> 4  14_1 14_2 14_3 14_4 MC14 STD 55 I/O O
Addr<7> 6  14_5 15_1 15_2 15_3 15_4 15_5 MC15 STD 56 I/O O
Addr<3> 3  16_1 16_2 16_3 MC16 STD 64 I/O O
Addr<6> 3  17_1 17_2 17_3 MC17 STD 58 I/O O
Addr<14> 4  18_1 18_2 18_3 18_4 MC18 STD 59 I/O O

Signals Used By Logic in Function Block
  1. A0
  2. Addr<10>
  3. Addr<11>
  4. Addr<12>
  5. Addr<13>
  6. Addr<14>
  7. Addr<1>
  8. Addr<2>
  9. Addr<3>
  10. Addr<4>
  11. Addr<5>
  12. Addr<6>
  13. Addr<7>
  14. Addr<8>
  15. Addr<9>
  16. CPUAccessOn
  17. RamD<3>.PIN
  18. RamD<6>.PIN
  19. RamD<7>.PIN
  20. RamD<1>.PIN
  21. HorizClk
  22. HorizCount<0>
  23. ReloadAccess
  24. VertCount<8>
  25. VertState_FFd1
  26. VertState_FFd2
  27. nOE