AN0007 - Attaching a GPS module to the EB675001DIP

Sections:

Introduction

This application note describes the addition of a GPS module to the EB675001 Module. The GPS module selected was the RF solutions LS-40EB-3V. This module was selected for its small size, ease of integration, 3.3V single input supply and cost effectiveness.

Hardware

The basic design is very straightforward, the GPS module is simply connected to the unbuffered LVTTL serial signals from the EB675001DIP and the 3.3V regulated supply. So information can be displayed localy provision has also been made to attach an HD44780 LCD module.

Schematic

The schematic and board were created with the "lite" version of the Cadsoft EAGLE package. This package was used to demonstrate what can be achieved, even in a half size eurocard, with the flexibility of the EB675001DIP module. The schematic was constructed using standard EAGLE library with a few additions

library file for the EB675001DIP
RF Solutions LS-40EB library
LCD module library
National semiconductors LM1085 3.3V@1.5A regulator, not defined in the EAGLE libraries

The complete schematic diagram is straightforward. (please refer to the documentation section for this schematic in several formats)

Board Design

A PCB design has been prepared in EAGLE. The main design parameters were :

Track width of 0.3mm (approx 12mil)
Track gap of 0.2mm (approx 8mil)
Simple two layer (top/bottom) design
Attempt to keep number of vias low
Use of inexpensive 0603 discreets

because of this this board should be relatively easy to manufacture hence reduce costs.

A 3D povray model was created with Eagle 3D. This model is useful in designing enclosures and for visualising the completed design.

Firmware

The user CPLD is only used in this design to interface the LCD module and is the same code as used in the Attaching an LCD module to the EB675001DIP application note.

Software

μCLinux was used to communicate with the GPS module. Communication is simply achieved using the ttyS0 serial port set to 4800 baud , 8 data bits no parity and 1 stop bit (4800,8N1).

Documentation

Schematic Diagram

Online Support

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