Design Name | template |
Fitting Status | Successful |
SW Version | G.26 |
Device Used | XC9572XL-7-TQ100 |
Date | 1- 1-2000, 4:15PM |
Macrocells Used | Pterms Used | Registers Used | Pins Used | Function Block Inputs Used |
---|---|---|---|---|
65/72 (91%) | 183/360 (51%) | 28/72 (39%) | 62/72 (87%) | 107/216 (50%) |
|
|
Total Macrocells Available | 72 |
Registered Macrocells | 28 |
Non-registered Macrocells driving I/O | 35 |
Signal mapped onto global clock net (GCK1) | nxwe_i |
Signal mapped onto global clock net (GCK2) | nxoe_i |
Signal mapped onto global clock net (GCK3) | cko_i |
Signal mapped onto global output enable net (GSR) | nrst_i |
Macrocells in high performance mode (MCHP) | 65 |
Macrocells in low power mode (MCLP) | 0 |
Total macrocells used (MC) | 65 |