Equations

clk_counter<0>.T = Vcc;
clk_counter<0>.CLK = cko_i; // GCK

clk_counter<1>.T = clk_counter<0>;
clk_counter<1>.CLK = cko_i; // GCK

clk_counter<2>.T = clk_counter<0> & clk_counter<1>;
clk_counter<2>.CLK = cko_i; // GCK

d_29 = !nxcs_i<3> & xa0_i;

en_ctrl<0>.D = xd<4>.PIN;
      en_ctrl<0>.CLK = nxwe_i; // GCK
      en_ctrl<0>.CE = !xa_i<21> & xa_i<23> & xa_i<22> & !nxcs_i<2> &
      nrst_i;

en_ctrl<1>.D = xd<5>.PIN;
      en_ctrl<1>.CLK = nxwe_i; // GCK
      en_ctrl<1>.CE = !xa_i<21> & xa_i<23> & xa_i<22> & !nxcs_i<2> &
      nrst_i;

en_ctrl<2>.D = xd<6>.PIN;
      en_ctrl<2>.CLK = nxwe_i; // GCK
      en_ctrl<2>.CE = !xa_i<21> & xa_i<23> & xa_i<22> & !nxcs_i<2> &
      nrst_i;

en_ctrl<3>.D = xd<7>.PIN;
      en_ctrl<3>.CLK = nxwe_i; // GCK
      en_ctrl<3>.CE = !xa_i<21> & xa_i<23> & xa_i<22> & !nxcs_i<2> &
      nrst_i;

en<0>.D = xd<0>.PIN;
      en<0>.CLK = nxwe_i; // GCK
      en<0>.OE = en_ctrl<0>;
      en<0>.CE = !xa_i<21> & xa_i<23> & xa_i<22> & !nxcs_i<2> &
      nrst_i;

en<1>.D = xd<1>.PIN;
      en<1>.CLK = nxwe_i; // GCK
      en<1>.OE = en_ctrl<1>;
      en<1>.CE = !xa_i<21> & xa_i<23> & xa_i<22> & !nxcs_i<2> &
      nrst_i;

en<2>.D = xd<2>.PIN;
      en<2>.CLK = nxwe_i; // GCK
      en<2>.OE = en_ctrl<2>;
      en<2>.CE = !xa_i<21> & xa_i<23> & xa_i<22> & !nxcs_i<2> &
      nrst_i;

en<3>.D = xd<3>.PIN;
      en<3>.CLK = nxwe_i; // GCK
      en<3>.OE = en_ctrl<3>;
      en<3>.CE = !xa_i<21> & xa_i<23> & xa_i<22> & !nxcs_i<2> &
      nrst_i;

ext_data<0> = nxwe_i & xd<8>.PIN
      # nxcs_i<3> & xd<8>.PIN
     ;Imported pterms FB3_17
      # nlbs_i & xd<8>.PIN
      # xd<0>.PIN & !nxwe_i & !nxcs_i<3> & !nlbs_i;
      ext_data<0>.OE = ext_data_3_IOBUFE/ext_data_3_IOBUFE_TRST;

ext_data<1> = nxwe_i & xd<9>.PIN
      # nxcs_i<3> & xd<9>.PIN
      # nlbs_i & xd<9>.PIN
      # !nxwe_i & xd<1>.PIN & !nxcs_i<3> & !nlbs_i;
      ext_data<1>.OE = ext_data_3_IOBUFE/ext_data_3_IOBUFE_TRST;

ext_data<2> = nxwe_i & xd<10>.PIN
      # nxcs_i<3> & xd<10>.PIN
      # nlbs_i & xd<10>.PIN
      # !nxwe_i & xd<2>.PIN & !nxcs_i<3> & !nlbs_i;
      ext_data<2>.OE = ext_data_3_IOBUFE/ext_data_3_IOBUFE_TRST;

ext_data<3> = nxwe_i & xd<11>.PIN
      # nxcs_i<3> & xd<11>.PIN
      # nlbs_i & xd<11>.PIN
      # !nxwe_i & xd<3>.PIN & !nxcs_i<3> & !nlbs_i;
      ext_data<3>.OE = ext_data_3_IOBUFE/ext_data_3_IOBUFE_TRST;

ext_data_3_IOBUFE/ext_data_3_IOBUFE_TRST = !nxwe_i & !nxcs_i<3> & !nlbs_i
# !nxwe_i & !nxcs_i<3> & !nubs_i;

ext_data<4> = nxwe_i & xd<12>.PIN
      # nxcs_i<3> & xd<12>.PIN
      # nlbs_i & xd<12>.PIN
      # !nxwe_i & !nxcs_i<3> & !nlbs_i & xd<4>.PIN;
      ext_data<4>.OE = ext_data_3_IOBUFE/ext_data_3_IOBUFE_TRST;

ext_data<5> = nxwe_i & xd<13>.PIN
      # nxcs_i<3> & xd<13>.PIN
      # nlbs_i & xd<13>.PIN
      # !nxwe_i & !nxcs_i<3> & !nlbs_i & xd<5>.PIN;
      ext_data<5>.OE = ext_data_3_IOBUFE/ext_data_3_IOBUFE_TRST;

ext_data<6> = nxwe_i & xd<14>.PIN
      # nxcs_i<3> & xd<14>.PIN
      # nlbs_i & xd<14>.PIN
      # !nxwe_i & !nxcs_i<3> & !nlbs_i & xd<6>.PIN;
      ext_data<6>.OE = ext_data_3_IOBUFE/ext_data_3_IOBUFE_TRST;

ext_data<7> = nxwe_i & xd<15>.PIN
      # nxcs_i<3> & xd<15>.PIN
      # nlbs_i & xd<15>.PIN
      # !nxwe_i & !nxcs_i<3> & !nlbs_i & xd<7>.PIN;
      ext_data<7>.OE = ext_data_3_IOBUFE/ext_data_3_IOBUFE_TRST;

!iord = !nxcs_i<3> & !nxoe_i;

!iowr = !nxwe_i & !nxcs_i<3>;

irq_en<0>.D = xd<0>.PIN;
      irq_en<0>.CLK = nxwe_i; // GCK
      !irq_en<0>.AR = nrst_i; // GSR
      irq_en<0>.CE = xa_i<21> & !xa_i<23> & !xa_i<22> & !nxcs_i<2>;

irq_en<1>.D = xd<1>.PIN;
      irq_en<1>.CLK = nxwe_i; // GCK
      !irq_en<1>.AR = nrst_i; // GSR
      irq_en<1>.CE = xa_i<21> & !xa_i<23> & !xa_i<22> & !nxcs_i<2>;

irq_en<2>.D = xd<2>.PIN;
      irq_en<2>.CLK = nxwe_i; // GCK
      !irq_en<2>.AR = nrst_i; // GSR
      irq_en<2>.CE = xa_i<21> & !xa_i<23> & !xa_i<22> & !nxcs_i<2>;

irq_en<3>.D = xd<3>.PIN;
      irq_en<3>.CLK = nxwe_i; // GCK
      !irq_en<3>.AR = nrst_i; // GSR
      irq_en<3>.CE = xa_i<21> & !xa_i<23> & !xa_i<22> & !nxcs_i<2>;

!irq_out = irq_en<1> & irq<1>
      # irq_en<2> & irq<2>
      # irq_en<3> & irq<3>
     ;Imported pterms FB2_12
      # irq_en<0> & irq<0>;

led<0>.D = xd<0>.PIN;
      led<0>.CLK = nxwe_i; // GCK
      led<0>.CE = !xa_i<21> & xa_i<23> & !xa_i<22> & !nxcs_i<2> &
      nrst_i;

led<1>.D = xd<1>.PIN;
      led<1>.CLK = nxwe_i; // GCK
      led<1>.CE = !xa_i<21> & xa_i<23> & !xa_i<22> & !nxcs_i<2> &
      nrst_i;

led<2>.D = xd<2>.PIN;
      led<2>.CLK = nxwe_i; // GCK
      led<2>.CE = !xa_i<21> & xa_i<23> & !xa_i<22> & !nxcs_i<2> &
      nrst_i;

led<3>.D = xd<3>.PIN;
      led<3>.CLK = nxwe_i; // GCK
      led<3>.CE = !xa_i<21> & xa_i<23> & !xa_i<22> & !nxcs_i<2> &
      nrst_i;

nbufen_io = Gnd;
!nbufen_io.OE = nxcs_i<3> & ncplden_i;

rst_out = !nrst_i;

clk_out.D = clk_counter<2>;
clk_out.CLK = cko_i; // GCK

!ucs<0> = !xa_i<21> & !xa_i<23> & !xa_i<22> & !nxcs_i<3>;

!ucs<1> = xa_i<21> & !xa_i<23> & !xa_i<22> & !nxcs_i<3>;

!ucs<2> = !xa_i<21> & !xa_i<23> & xa_i<22> & !nxcs_i<3>;

!ucs<3> = xa_i<21> & !xa_i<23> & xa_i<22> & !nxcs_i<3>;

user_bus<0>.D = en<0> & !xa_i<21> & xa_i<23> & xa_i<22>
      # xa_i<21> & xa_i<23> & !xa_i<22> & en<0>.PIN
      # xa_i<21> & !xa_i<23> & !xa_i<22> & irq_en<0>
      # !xa_i<21> & xa_i<23> & !xa_i<22> & led<0>
     ;Imported pterms FB2_15
      # !xa_i<21> & !xa_i<23> & xa_i<22> & irq<0>
     ;Imported pterms FB2_17
      # !xa_i<23> & xa_i<22> & irq_en<0> & irq<0>;
      !user_bus<0>.CLK = nxoe_i; // GCK
      user_bus<0>.CE = !nxcs_i<2> & nrst_i;

user_bus<1>.D = en<1> & !xa_i<21> & xa_i<23> & xa_i<22>
      # xa_i<21> & xa_i<23> & !xa_i<22> & en<1>.PIN
      # xa_i<21> & !xa_i<23> & !xa_i<22> & irq_en<1>
      # !xa_i<21> & xa_i<23> & !xa_i<22> & led<1>
     ;Imported pterms FB2_13
      # !xa_i<21> & !xa_i<23> & xa_i<22> & irq<1>
      # !xa_i<23> & xa_i<22> & irq_en<1> & irq<1>;
      !user_bus<1>.CLK = nxoe_i; // GCK
      user_bus<1>.CE = !nxcs_i<2> & nrst_i;

user_bus<2>.D = en<2> & !xa_i<21> & xa_i<23> & xa_i<22>
      # xa_i<21> & xa_i<23> & !xa_i<22> & en<2>.PIN
      # xa_i<21> & !xa_i<23> & !xa_i<22> & irq_en<2>
      # !xa_i<21> & xa_i<23> & !xa_i<22> & led<2>
     ;Imported pterms FB3_16
      # !xa_i<21> & !xa_i<23> & xa_i<22> & irq<2>
      # !xa_i<23> & xa_i<22> & irq_en<2> & irq<2>;
      !user_bus<2>.CLK = nxoe_i; // GCK
      user_bus<2>.CE = !nxcs_i<2> & nrst_i;

user_bus<3>.D = en<3> & !xa_i<21> & xa_i<23> & xa_i<22>
      # xa_i<21> & xa_i<23> & !xa_i<22> & en<3>.PIN
      # xa_i<21> & !xa_i<23> & !xa_i<22> & irq_en<3>
      # !xa_i<21> & xa_i<23> & !xa_i<22> & led<3>
     ;Imported pterms FB3_12
      # !xa_i<21> & !xa_i<23> & xa_i<22> & irq<3>
     ;Imported pterms FB3_14
      # !xa_i<23> & xa_i<22> & irq_en<3> & irq<3>;
      !user_bus<3>.CLK = nxoe_i; // GCK
      user_bus<3>.CE = !nxcs_i<2> & nrst_i;

user_bus<4>.D = !xa_i<21> & xa_i<23> & xa_i<22> & en_ctrl<0>;
!user_bus<4>.CLK = nxoe_i; // GCK
user_bus<4>.CE = !nxcs_i<2> & nrst_i;

user_bus<5>.D = !xa_i<21> & !xa_i<23> & !xa_i<22>
      # !xa_i<21> & xa_i<23> & xa_i<22> & en_ctrl<1>;
      !user_bus<5>.CLK = nxoe_i; // GCK
      user_bus<5>.CE = !nxcs_i<2> & nrst_i;

user_bus<6>.D = !xa_i<21> & xa_i<23> & xa_i<22> & en_ctrl<2>;
!user_bus<6>.CLK = nxoe_i; // GCK
user_bus<6>.CE = !nxcs_i<2> & nrst_i;

user_bus<7>.D = !xa_i<21> & !xa_i<23> & !xa_i<22>
      # !xa_i<21> & xa_i<23> & xa_i<22> & en_ctrl<3>;
      !user_bus<7>.CLK = nxoe_i; // GCK
      user_bus<7>.CE = !nxcs_i<2> & nrst_i;

xd<0> = nxcs_i<2> & ext_data<0>.PIN
      # nxoe_i & ext_data<0>.PIN
      # !nxcs_i<2> & !nxoe_i & user_bus<0>;
      xd<0>.OE = xd_0_IOBUFE/xd_0_IOBUFE_TRST;

xd_0_IOBUFE/xd_0_IOBUFE_TRST = !nxcs_i<2> & !nxoe_i
# !nxcs_i<3> & !nlbs_i & !nxoe_i;

xd<10> = ext_data<2>.PIN;
xd<10>.OE = !nxcs_i<3> & !nxoe_i & !nubs_i;

xd<11> = ext_data<3>.PIN;
xd<11>.OE = !nxcs_i<3> & !nxoe_i & !nubs_i;

xd<12> = ext_data<4>.PIN;
xd<12>.OE = !nxcs_i<3> & !nxoe_i & !nubs_i;

xd<13> = ext_data<5>.PIN;
xd<13>.OE = !nxcs_i<3> & !nxoe_i & !nubs_i;

xd<14> = ext_data<6>.PIN;
xd<14>.OE = !nxcs_i<3> & !nxoe_i & !nubs_i;

xd<15> = ext_data<7>.PIN;
xd<15>.OE = !nxcs_i<3> & !nxoe_i & !nubs_i;

xd<1> = nxcs_i<2> & ext_data<1>.PIN
      # nxoe_i & ext_data<1>.PIN
      # !nxcs_i<2> & !nxoe_i & user_bus<1>;
      xd<1>.OE = xd_0_IOBUFE/xd_0_IOBUFE_TRST;

xd<2> = nxcs_i<2> & ext_data<2>.PIN
      # nxoe_i & ext_data<2>.PIN
      # !nxcs_i<2> & !nxoe_i & user_bus<2>;
      xd<2>.OE = xd_0_IOBUFE/xd_0_IOBUFE_TRST;

xd<3> = nxcs_i<2> & ext_data<3>.PIN
      # nxoe_i & ext_data<3>.PIN
      # !nxcs_i<2> & !nxoe_i & user_bus<3>;
      xd<3>.OE = xd_0_IOBUFE/xd_0_IOBUFE_TRST;

xd<4> = nxcs_i<2> & ext_data<4>.PIN
      # nxoe_i & ext_data<4>.PIN
      # !nxcs_i<2> & !nxoe_i & user_bus<4>;
      xd<4>.OE = xd_0_IOBUFE/xd_0_IOBUFE_TRST;

xd<5> = nxcs_i<2> & ext_data<5>.PIN
      # nxoe_i & ext_data<5>.PIN
      # !nxcs_i<2> & !nxoe_i & user_bus<5>;
      xd<5>.OE = xd_0_IOBUFE/xd_0_IOBUFE_TRST;

xd<6> = nxcs_i<2> & ext_data<6>.PIN
      # nxoe_i & ext_data<6>.PIN
      # !nxcs_i<2> & !nxoe_i & user_bus<6>;
      xd<6>.OE = xd_0_IOBUFE/xd_0_IOBUFE_TRST;

xd<7> = nxcs_i<2> & ext_data<7>.PIN
      # nxoe_i & ext_data<7>.PIN
      # !nxcs_i<2> & !nxoe_i & user_bus<7>;
      xd<7>.OE = xd_0_IOBUFE/xd_0_IOBUFE_TRST;

xd<8> = ext_data<0>.PIN;
xd<8>.OE = !nxcs_i<3> & !nxoe_i & !nubs_i;

xd<9> = ext_data<1>.PIN;
xd<9>.OE = !nxcs_i<3> & !nxoe_i & !nubs_i;

xwait_o = !nwait_i;

Legend: .COMB = combinational node mapped to the same physical macrocell
as the FastInput "signal" (not logically related)